BitWiz
Experienced Member
I am not good at hardware design (sorry i'm mainly a software guy). I'm looking for a design/circuit that for inside some kind of programmable logic that would be a bus access interface that would be controlled by a micro (raspberry pi pico in my case). Here are the capabilities I'm looking for:
- Read from memory (all fields)
- Write to memory (all fields)
- Halt the CPU
- Restart the CPU
- Clear the CPU
- Address Load
- Extended Address Load
- Capture bus frames (to be sent to the pico via high speed spi and DMA on the pico)
- 1 cycle data break for both reads and writes.
- Address, r/w and data comparators to implement a breakpoint. This would signal the pico that a match happened, issue an omnibus halt. The pico will restart the CPU.
- Bootloader
- Read/Write memory
- Set a break point
- Clear a breakpoint
- Program Trace (via the bus capture capabilities)
- IOT handler for I/O device emulation (DF32, RS08, KL8E, RX8E/RX28, RK05, RL8A, etc.)
- Memory Disassembly
- Simple Assembler into memory
- External I2C Octal/Text status display with on the fly code disassembly when examining or single stepping from the front panel.