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PET 2001-8 Stability Issues

Holmes,
Here is a PDF document on the 6502 Address Line Tester. The easiest way to build one, is just use a spare 6502, and bend the D0 to D7 pins out so
they don't go into the motherboard socket. Wire each D0..D7 pin according to the high or low needed for the NOP instruction.


https://www.dropbox.com/s/bhx45h0impestpr/6502_Address_Tester.pdf?dl=0

Larry

Thanks Larry - that's a great help as it takes me through the process.


Larry,
That's a good description although one would not not use a wire wrap socket. It will ruin the PET main board socket. Using two regular sockets make the mod on the top socket fairly easy without fear of inadvertent shorts to the main board.
-Dave

Yeah, I would think the wire wrap socket would damage the motherboard socket by stretching out the connectors or something.


Holmes, you are right. You have your thinking cap on! If the addressing error were external to the RAM chips, it would probably cause a problem with the system booting. If internal to a RAM chip above the first 1K, it would only effect the running of BASIC. Perhaps put new RAM chips in I2 and J2 for RAM in address range $0400-07FF (1000-1999 Decimal). This is the start of BASIC area. The NOP Generator may not find an internal error of this type.

That makes sense. It makes sense to localize the address testing to individual chips or pairs of chips (for a 1KB block), as it looks like this may be an address problem within a RAM chip (never knew this type existed until daver2 mentioned it, but I guess anytime you have pins coming into a chip, there's a possibility of a short somewhere in there).


I wouldn't expect your problem to be an addressing fault per-se (as the bulk of your PET seems to be basically working) - but the NOP generator (+ the use of a scope to check the address lines) is a very good check anyhow.

My gut feeling is a partial address problem within a RAM chip. Less common - but that is exactly the fault I had with my Apple IIe.

You could modify your test program to:

1) Write 0x00 into all memory bytes of your address range.
2) Write your test pattern to the byte address being checked.
3) Check that your correct pattern is where you expect it to be and that the other memory bytes still contain 0x00.
4) Change all of the 0x00 bytes to 0xFF.
5) Check that your test byte is still as expected (i.e. it hasn't changed).
6) Re-do your test pattern and check that it is still working and that the remainder of memory still contains 0xFF.
7) Repeat for all test byte values.
8) Repeat for all memory addresses in the range.

Be warned though - this test will run significantly slower than your initial test - so you want to include some sort of visual output (e.g. displaying a '*' when it has fully tested so many memory locations) to give you confidence that it is working (and hasn't locked up)!

Dave

Cool, thanks! So based on your algorithm, you suspect the addressing problem may affect any other location on the chip? I guess that makes sense, since you can get to any other location by flipping just any random bit. Hmm. What I may do then is to use your algorithm but restrict the range tested to a single memory chip at a time. I could run it for each successive 1KB range like dave_m suggested, thus minimizing the overhead of resetting all the other memory locations (which is basically the entire memory test range).

I do plan to do the NOP generator as well, since I'd like to check this part and verify it's okay. And I've got other 6502 machines which may need this in the future.
 
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