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Searching for IBM S/23 Datamaster users

I checked among other pins 35 and 36 por in case I made a mistake and was a 8203 instead. However, to work accordingly with the memories it has and to work with an external clock both pins should have been tied to +5V, which is not the case. I am sure it is what I said... On the other hand could it be that the controller in the slave card was a 8203 configured to work in 16k mode? How could I have some kind of confirmation on that?

I found a direct connection from the 74LS670 on the edge of the board to the ROS memories. If two registers were for the CPU memory map and the other two were for DMA use, It would only amount to 128KB per bank as the registers are only four bits. Something is missing from my scheme, it's just I still don't know what it is.

By the way, your boards look gorgeous. I am glad they did survive... My unit only has the floppy drive controller board so it will be difficult for me to ever come close to one of those.



I knew they released it late because they wanted BASIC compatibility with the S/34, but other than that I ignore what is the degree they implemented. Please, have in mind I started with this system a year ago and work on it had been halted most of the time - my experience is very limited. I wish I knew half the things you know - that's why I am asking. ;)
Ya, I guess I will start with your ending of the message.
Don't worry about your experience is very limited and that the system was parked for a while.
As you are probably aware and some others are also aware that most of the technical information on the system 23 no longer exist any ware online. (Schematics and register information).
So this information has to be rediscovered you could say. That takes some time to do of course. Now I will try to give you some suggestions to the 128K memory issue.
..
Hopefully I don't get to many typeo's in this reply - It has been quite a while since I did anything with the 8202 and 8203 DRAM Ctrls, but I have done a couple of quick pages hopefully this helps.
As a reminder, remember that their are jumper on the mother board that control how much memory is installed in the system 23 memory card slots. (This information is in the technical manuals
located at bitsavers,org archive for the system 23 computer). For those who want to know more about it.
..
As for the Intel 8203 and 8202 issues with the 75LS670 only seeing 128K per bank, what is likely missing is the upper bank register selection lines and yes, the memory controller in the slave card a 8203 can
be configured to work in 16k mode, there was older logic board version that had used the 8202. On some models of the System 23 below the 500 models only so much memory is available through the memory
card slots and the rest of the systems address space is only available to the expansion card slots. (The additional address lines are not wired to a jumper location for the DRAM Controller to be able to access them).
A lot of early IBM mainframe and minicomputer systems have 2 memory registers one for Address to 16M range and another one for addresses over the 16M range, And yes on some IBM Mainframes only half
of each register is used the rest are reserved.
..
The Intel 8202 supported up to 128K Bytes without external driver circuits added. The 8203 in 16K mode Pin 35 is tide to VCC or is left open then two blank select inputs are active.
In this mode the 8302 is backwards compatible with the Intel 8302 DRAM CTRL. In 64K mode pin 35 on the 8203 is tied Gnd, this lets one bank select input pin 26 be active for 128K.
..
A lot of early IBM systems have 2 memory registers one for Address to 16M range and another one for addresses over the 16M range, And yes on some IBM Mainframes and minicomputers only half of each register
is used the rest are reserved. As a small hint, on most Intel 8085 based Multibus boards that only supported 128K of memory without a MMU intel had a jumper to connect the 8085's SIO signal to the Address line
A16 directly.
..
The bug thing is on the clones you can separate Stack space into two pages of 64K each, one for Stack data and the other for Stack Control data, plus the fact that you can separate the memory further into Program
Space and System Space, that both have there own 64K space for Data or instructions. This is normally done with external logics when using a Intel 8085 or Zilog Z80 microprocessor.
..
For more Information on using the Intel 8202 and 8203 DRAm Controllers is :
To find Intel's designers notes for the 8202 and 8203 DRAM CTRLS or a schematic for a 3RD parity memory expansion unit for the Sinclair QL that used the 8202 or 8203 DRAM Controllers that allowed
for 256K to 1M byte of extra memory. To use 8K or 32K dram chips they are pulling a couple of the AH and AL signal lines hi depending on the DRAM Chip being used. To use 128K DRAM chips they redirect the
bank select inputs to a higher address line and are disabling half of the memory's A8 signal line. (Some times called RAS2 on some DRAM Chips), depending on the DRAM Controller.
..
Luckily I had some free time today to reply to your inquiry.
Remember that their are jumper on the mother board that control how much memory is installed in the system memory card slots
 

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Hello!

My work towards RAM replacement will, with a bit of luck, end soon. A prototype designed with available and inexpensive parts has been ordered. It's not perfect but I think it will do the trick. With it, unrepairable memory cards could be replaced or, in case the originals are working fine, serve as an internal upgrade. It contains 64KB (8 bits plus parity) of static memories and does not require anything else than 5V. It should arrive in about two weeks.

View attachment 1277013

At the same time, a prototype to replace ROMs 02 and 09 have also been ordered. The one for the rest of ROS memories is still being worked on, and don't know when will it be ordered. With a bit of luck, in about a month, I could have something decent.

Regards,
Jaume
 
Cool your making a replacement memory card, so I attach the Memory card Slots and Expansion Bus pinout for anybody that interested.
..
If pin A04 is used on slot A the Feature R/W storage location, this slot will support more then 64K, Pins B8, B9 and B16 could be active, on models 500 and above.
Slot B the is the BASE R/W Storage location. Pins B8, B9 and B16 could be active on models 500 and above.
..
4 bits makes 16 pages of 16384 Kbytes is 262,192K bytes, the same is available for ROS memory, memory above that is decoded by additional logic.
You can thing of this additional memory decoding as Page Bit 0 = A16, Page bit 1 = A17, Page bit 2 = A18, Page Bit 3 = A19
..
The Jumper Pin locations for the memory card size selection can be found in the System 23 technical manuals available at bitsavers.org archive on the system 23 under the sub directly of FE.
Thanks'
 

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  • SYS23 Slot Pinouts.pdf
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Cool your making a replacement memory card, so I attach the Memory card Slots and Expansion Bus pinout for anybody that interested.
..
If pin A04 is used on slot A the Feature R/W storage location, this slot will support more then 64K, Pins B8, B9 and B16 could be active, on models 500 and above.
Slot B the is the BASE R/W Storage location. Pins B8, B9 and B16 could be active on models 500 and above.
..
4 bits makes 16 pages of 16384 Kbytes is 262,192K bytes, the same is available for ROS memory, memory above that is decoded by additional logic.
You can thing of this additional memory decoding as Page Bit 0 = A16, Page bit 1 = A17, Page bit 2 = A18, Page Bit 3 = A19
..
The Jumper Pin locations for the memory card size selection can be found in the System 23 technical manuals available at bitsavers.org archive on the system 23 under the sub directly of FE.
Thanks'

Good morning,

I thought a replacement card was a good idea because they are repairable until spares run out - and in my opinion we are very close now with those. During my early troubleshooting, one of my collaborators granted my request to show me how the system behaved without memory card and thanks to them we determined the fault was located there. My system had black screen by then and our Datamaster ("our" because I share collection with @retrolab ) was risking to have the same fate as our AS/400 B10. It was a miracle everything else was alright and we just got prompted into BASIC. The truth is that it sickens me that these computers are left to decay, especially knowing their historical importance. Leaving them untouched makes up for most, even if it brings the comnputer into an unopperable state - yet we have to remember that when that happens we lose half the system as the software part of these systems ceases to be available.

Ok, I found my mistake. I was counting 8KB-sized pages instead of 16KB ones - that's why my calculations are half the size than they should.😵‍💫

Ya, I guess I will start with your ending of the message.
Don't worry about your experience is very limited and that the system was parked for a while.
As you are probably aware and some others are also aware that most of the technical information on the system 23 no longer exist any ware online. (Schematics and register information).
So this information has to be rediscovered you could say. That takes some time to do of course. Now I will try to give you some suggestions to the 128K memory issue.
..
Hopefully I don't get to many typeo's in this reply - It has been quite a while since I did anything with the 8202 and 8203 DRAM Ctrls, but I have done a couple of quick pages hopefully this helps.
As a reminder, remember that their are jumper on the mother board that control how much memory is installed in the system 23 memory card slots. (This information is in the technical manuals
located at bitsavers,org archive for the system 23 computer). For those who want to know more about it.
..
As for the Intel 8203 and 8202 issues with the 75LS670 only seeing 128K per bank, what is likely missing is the upper bank register selection lines and yes, the memory controller in the slave card a 8203 can
be configured to work in 16k mode, there was older logic board version that had used the 8202. On some models of the System 23 below the 500 models only so much memory is available through the memory
card slots and the rest of the systems address space is only available to the expansion card slots. (The additional address lines are not wired to a jumper location for the DRAM Controller to be able to access them).
A lot of early IBM mainframe and minicomputer systems have 2 memory registers one for Address to 16M range and another one for addresses over the 16M range, And yes on some IBM Mainframes only half
of each register is used the rest are reserved.
..
The Intel 8202 supported up to 128K Bytes without external driver circuits added. The 8203 in 16K mode Pin 35 is tide to VCC or is left open then two blank select inputs are active.
In this mode the 8302 is backwards compatible with the Intel 8302 DRAM CTRL. In 64K mode pin 35 on the 8203 is tied Gnd, this lets one bank select input pin 26 be active for 128K.
..
A lot of early IBM systems have 2 memory registers one for Address to 16M range and another one for addresses over the 16M range, And yes on some IBM Mainframes and minicomputers only half of each register
is used the rest are reserved. As a small hint, on most Intel 8085 based Multibus boards that only supported 128K of memory without a MMU intel had a jumper to connect the 8085's SIO signal to the Address line
A16 directly.
..
The bug thing is on the clones you can separate Stack space into two pages of 64K each, one for Stack data and the other for Stack Control data, plus the fact that you can separate the memory further into Program
Space and System Space, that both have there own 64K space for Data or instructions. This is normally done with external logics when using a Intel 8085 or Zilog Z80 microprocessor.
..
For more Information on using the Intel 8202 and 8203 DRAm Controllers is :
To find Intel's designers notes for the 8202 and 8203 DRAM CTRLS or a schematic for a 3RD parity memory expansion unit for the Sinclair QL that used the 8202 or 8203 DRAM Controllers that allowed
for 256K to 1M byte of extra memory. To use 8K or 32K dram chips they are pulling a couple of the AH and AL signal lines hi depending on the DRAM Chip being used. To use 128K DRAM chips they redirect the
bank select inputs to a higher address line and are disabling half of the memory's A8 signal line. (Some times called RAS2 on some DRAM Chips), depending on the DRAM Controller.
..
Luckily I had some free time today to reply to your inquiry.
Remember that their are jumper on the mother board that control how much memory is installed in the system memory card slots

With some luck we may have more boards in the future for those extra capacities but for the moment I will stick to functional replicas. When I have a moment to continue studying this board, I will look closely for all hints you are giving me.👍

As stated, I have also ordered some more prototypes. One will replace 02 and 09 with a single 16KB EPROM; this was made in order to save other computers with any of both ROMs failing, specially the first one - that would also provoke black screen symptoms. A MK36000 to 27C010 has also been ordered. At first glance it might seem overkill for a single memory, but in reality it would need to work with another circuit I have to test (this fourth has not been ordered yet). The original idea was to intercept the incoming signals and feed them into some custom logic to activate the 128KB EPROM, however it was later found that both decoders had different activation conditions and couldn't directly work as a single 4-to-16 line decoder. A workaround is to intercept the outcoming signals from the decoders and, with the help of jumpers decide if they are fed to the board or to the new select logic instead. This way two use cases are possible: the complete ROS being took over by the EPROM or only certain sections of it being replaced.

I think the next section to study would be the video subsystem, as RAM, ROM are involved and some ports are known. This way all major sections that could cause black screen would be more or less known. It's kind of unfortunate that troubleshooting information just ends with the "replace FRU"... I would like to make some kind of diagram to help resolving this symptom.

Thank you very much
 
I was going to say would an 8085 In-Circuit Emulator at all help to see what the system was doing but I checked and all I have are ICE's for Z80 and 8088/8086. :/
 
Ya, I guess I will start with your ending of the message.
Don't worry about your experience is very limited and that the system was parked for a while.
As you are probably aware and some others are also aware that most of the technical information on the system 23 no longer exist any ware online. (Schematics and register information).
So this information has to be rediscovered you could say. That takes some time to do of course. Now I will try to give you some suggestions to the 128K memory issue.
..
Hopefully I don't get to many type o's in this reply - It has been quite a while since I did anything with the 8202 and 8203 DRAM Ctrls, but I have done a couple of quick pages hopefully this helps.
As a reminder, remember that their are jumper on the mother board that control how much memory is installed in the system 23 memory card slots. (This information is in the technical manuals
located at bitsavers,org archive for the system 23 computer). For those who want to know more about it.
..
As for the Intel 8203 and 8202 issues with the 75LS670 only seeing 128K per bank, what is likely missing is the upper bank register selection lines and yes, the memory controller in the slave card a 8203 can
be configured to work in 16k mode, there was older logic board version that had used the 8202. On some models of the System 23 below the 500 models only so much memory is available through the memory
card slots and the rest of the systems address space is only available to the expansion card slots. (The additional address lines are not wired to a jumper location for the DRAM Controller to be able to access them).
A lot of early IBM mainframe and minicomputer systems have 2 memory registers one for Address to 16M range and another one for addresses over the 16M range, And yes on some IBM Mainframes only half
of each register is used the rest are reserved.
..
The Intel 8202 supported up to 128K Bytes without external driver circuits added. The 8203 in 16K mode Pin 35 is tide to VCC or is left open then two blank select inputs are active.
In this mode the 8302 is backwards compatible with the Intel 8302 DRAM CTRL. In 64K mode pin 35 on the 8203 is tied Gnd, this lets one bank select input pin 26 be active for 128K.
..
A lot of early IBM systems have 2 memory registers one for Address to 16M range and another one for addresses over the 16M range, And yes on some IBM Mainframes and minicomputers only half of each register
is used the rest are reserved. As a small hint, on most Intel 8085 based Multibus boards that only supported 128K of memory without a MMU intel had a jumper to connect the 8085's SIO signal to the Address line
A16 directly.
..
The bug thing is on the clones you can separate Stack space into two pages of 64K each, one for Stack data and the other for Stack Control data, plus the fact that you can separate the memory further into Program
Space and System Space, that both have there own 64K space for Data or instructions. This is normally done with external logics when using a Intel 8085 or Zilog Z80 microprocessor.
..
For more Information on using the Intel 8202 and 8203 DRAM Controllers is :
To find Intel's designers notes for the 8202 and 8203 DRAM CTRLS or a schematic for a 3RD parity memory expansion unit for the Sinclair QL that used the 8202 or 8203 DRAM Controllers that allowed
for 256K to 1M byte of extra memory. To use 8K or 32K dram chips they are pulling a couple of the AH and AL signal lines hi depending on the DRAM Chip being used. To use 128K DRAM chips they redirect the
bank select inputs to a higher address line and are disabling half of the memory's A8 signal line. (Some times called RAS2 on some DRAM Chips), depending on the DRAM Controller.
..
Luckily I had some free time today to reply to your inquiry.
Remember that their are jumper(s) on the mother board that control how much memory is installed in the system memory card slots on models above 500.
 
Ya, I guess I will start with your ending of the message.
Don't worry about your experience is very limited and that the system was parked for a while.
As you are probably aware and some others are also aware that most of the technical information on the system 23 no longer exist any ware online. (Schematics and register information).
So this information has to be rediscovered you could say. That takes some time to do of course. Now I will try to give you some suggestions to the 128K memory issue.
..
Hopefully I don't get to many typeo's in this reply - It has been quite a while since I did anything with the 8202 and 8203 DRAM Ctrls, but I have done a couple of quick pages hopefully this helps.
As a reminder, remember that their are jumper on the mother board that control how much memory is installed in the system 23 memory card slots. (This information is in the technical manuals
located at bitsavers,org archive for the system 23 computer). For those who want to know more about it.
..
As for the Intel 8203 and 8202 issues with the 75LS670 only seeing 128K per bank, what is likely missing is the upper bank register selection lines and yes, the memory controller in the slave card a 8203 can
be configured to work in 16k mode, there was older logic board version that had used the 8202. On some models of the System 23 below the 500 models only so much memory is available through the memory
card slots and the rest of the systems address space is only available to the expansion card slots. (The additional address lines are not wired to a jumper location for the DRAM Controller to be able to access them).
A lot of early IBM mainframe and minicomputer systems have 2 memory registers one for Address to 16M range and another one for addresses over the 16M range, And yes on some IBM Mainframes only half
of each register is used the rest are reserved.
..
The Intel 8202 supported up to 128K Bytes without external driver circuits added. The 8203 in 16K mode Pin 35 is tide to VCC or is left open then two blank select inputs are active.
In this mode the 8302 is backwards compatible with the Intel 8302 DRAM CTRL. In 64K mode pin 35 on the 8203 is tied Gnd, this lets one bank select input pin 26 be active for 128K.
..
A lot of early IBM systems have 2 memory registers one for Address to 16M range and another one for addresses over the 16M range, And yes on some IBM Mainframes and minicomputers only half of each register
is used the rest are reserved. As a small hint, on most Intel 8085 based Multibus boards that only supported 128K of memory without a MMU intel had a jumper to connect the 8085's SIO signal to the Address line
A16 directly.
..
The bug thing is on the clones you can separate Stack space into two pages of 64K each, one for Stack data and the other for Stack Control data, plus the fact that you can separate the memory further into Program
Space and System Space, that both have there own 64K space for Data or instructions. This is normally done with external logics when using a Intel 8085 or Zilog Z80 microprocessor.
..
For more Information on using the Intel 8202 and 8203 DRAM Controllers is :
To find Intel's designers notes for the 8202 and 8203 DRAM CTRLS or a schematic for a 3RD parity memory expansion unit for the Sinclair QL that used the 8202 or 8203 DRAM Controllers that allowed
for 256K to 1M byte of extra memory. To use 8K or 32K dram chips they are pulling a couple of the AH and AL signal lines hi depending on the DRAM Chip being used. To use 128K DRAM chips they redirect the
bank select inputs to a higher address line and are disabling half of the memory's A8 signal line. (Some times called RAS2 on some DRAM Chips), depending on the DRAM Controller.
..
Luckily I had some free time today to reply to your inquiry.
Remember that their are jumper(s) on the system 23 mother board that control how much memory is installed in the system memory card slots on models above 500 level.
There are jumpers on the memory card that control its configuration for the system 23 memory cards in the 64K and 128K card configuration. But on the more advance system 23 clones there is also some jumpers/resistors that control the enhanced memory cards extended address range on the motherboard. The 128K card needs the extended address bus bits A16 to be active as well as A17 for the second 128K card plus a unused memory bank address in order to used
it/ them. I thought it would be kind of important to add this information, just incase it is needed.
 
There are jumpers on the memory card that control its configuration for the system 23 memory cards in the 64K and 128K card configuration. But on the more advance system 23 clones there is also some jumpers/resistors that control the enhanced memory cards extended address range on the motherboard. The 128K card needs the extended address bus bits A16 to be active as well as A17 for the second 128K card plus a unused memory bank address in order to used
it/ them. I thought it would be kind of important to add this information, just incase it is needed.
I maintained the original jumpers of the memory board. When I was designing it I was tempted to change the format but at the end I thought that if they were left in the same format it would be more familiar when installing it and also would conform to the manual IBM made. I will consider more advanced boards when this first one has been tested and revised because while it is certainly tempting my priority is still to provide replacements.

There is, however a way you could help considerably with your knowledge. I used pseudodinamic memories for this prototype, in other words cheap 32KB cache memories simulating a full bank of TMS4132. The problem arises when dealing with the parity bit. To keep things simple I put a second cache memory per bank, which is surface inneficient. If a read-update-write cycle mechanism could be established, more than a single bit per parity memory could be used which in turn would lead to a more compact design. If that happens, then I could easily repurpose the unused memories to increase the address space.

Thank you in advance
 
I was going to say would an 8085 In-Circuit Emulator at all help to see what the system was doing but I checked and all I have are ICE's for Z80 and 8088/8086. :/
I am using GHidra to study the firmware, but it lacks the illegal instructions that the Datamaster extensively uses.

I thought on using a baremetal Pi to replace the processor and being able to control IO ports at will but I lack the skill to do that. Unfortunately C is out of the scope for me, even more if the task requires optimal execution times.

In any case, thank you.
 
I am using GHidra to study the firmware, but it lacks the illegal instructions that the Datamaster extensively uses.

I thought on using a baremetal Pi to replace the processor and being able to control IO ports at will but I lack the skill to do that. Unfortunately C is out of the scope for me, even more if the task requires optimal execution times.

In any case, thank you.
Ya some ware on the internet the undocumented Intel 8085 instructions are available to download, but the IBM extensions to it are mostly decoded by the rerouting of invalid 8085 instructions to a overlay
that has the code to emulate the instruction and/or expand its function.
I have already noted about this in another message on this forum about this subject. You could disassemble the ROS firmware or get it converted to PM/L code, If you can find the software to do that.
..
As far as using Ghidra and or baremetel PI do you have a contact to some body that can add custom modules to its library ? If so this would be great help using them.
If you can find some one who has a microprocessor development system for a IBM compatible PC with the interface module for the Intel 8085 that would be the easiest way to decode the systems instruction.
The baremetel PI can be used, but that will lead to some other issues. Specially it you have a large work load to do on top of that, to deal with it.
 
Ya some ware on the internet the undocumented Intel 8085 instructions are available to download, but the IBM extensions to it are mostly decoded by the rerouting of invalid 8085 instructions to a overlay
that has the code to emulate the instruction and/or expand its function.
I have already noted about this in another message on this forum about this subject. You could disassemble the ROS firmware or get it converted to PM/L code, If you can find the software to do that.
..
As far as using Ghidra and or baremetel PI do you have a contact to some body that can add custom modules to its library ? If so this would be great help using them.
If you can find some one who has a microprocessor development system for a IBM compatible PC with the interface module for the Intel 8085 that would be the easiest way to decode the systems instruction.
The baremetel PI can be used, but that will lead to some other issues. Specially it you have a large work load to do on top of that, to deal with it.
I think I have an alternative.
About eight years ago I wrote an 8085 emulator as my final project as a student. I lost the code in a ssd crash about two years ago, however my work is in storage at my university. It also included an assembler.
Maybe, if I recover my old Java code and modify it a little, I may get a full 8085 disassembler.
 
Today I have found that the diagnostic pins are directly connected to a nearby 8255, port B. Could the "miniprobe" described in the diagnostics manual be that simple as 8 leds with a connector? If that's this it could be easier to discriminate those boards with some kind of display issue from others that are totally dead.

EDIT

And the high number of 8255 is due they are used to handle most of the configuration jumpers present in the board.
 
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I maintained the original jumpers of the memory board. When I was designing it I was tempted to change the format but at the end I thought that if they were left in the same format it would be more familiar when installing it and also would conform to the manual IBM made. I will consider more advanced boards when this first one has been tested and revised because while it is certainly tempting my priority is still to provide replacements.

There is, however a way you could help considerably with your knowledge. I used pseudodinamic memories for this prototype, in other words cheap 32KB cache memories simulating a full bank of TMS4132. The problem arises when dealing with the parity bit. To keep things simple I put a second cache memory per bank, which is surface inneficient. If a read-update-write cycle mechanism could be established, more than a single bit per parity memory could be used which in turn would lead to a more compact design. If that happens, then I could easily repurpose the unused memories to increase the address space.

Thank you in advance
Sorry Insufficient design data about your replacement memory board, for me to comment about/help improve it.
Only one undocumented Color PCB board image. No component part numbers or Component numbers listed on PCB Board image or any schematics for this board .
I don not really have that much available time to re schematic it then go looking for the right components.
..
That is why I did not respond to it.
You could post more data about it and ask for some help with it on this forum, it you wish to.
 
Sorry Insufficient design data about your replacement memory board, for me to comment about/help improve it.
Only one undocumented Color PCB board image. No component part numbers or Component numbers listed on PCB Board image or any schematics for this board .
I don not really have that much available time to re schematic it then go looking for the right components.
..
That is why I did not respond to it.
You could post more data about it and ask for some help with it on this forum, it you wish to.
Hello Nathan,

I would like to test the boards when I receive them, and then whatever the result is, share the appropriate files.

I now know why most of the the undocumented jumpers of the motherboard are a mystery... they don't actuate directly over logic but input ports instead. Their secrets lie in the firmware alone.
There is still an issue to solve to have a memory map of this machine, which is the placement of the video RAM and the character ROM. Both are 8KB long and would fit in a single page. In my opinion it would be very interesting to know where and how did they built the language selection mechanism.

Regards
 
Greetings,

I acquired an IBM System 23 "Datamaster" a couple of weeks ago. I have found many people over the not so many places where this computer is being discussed where they stated its non-reparability (the motherboard was designed as FRU, after all).
As I am in process to repair mine, an exhaustive study of the boards is being made. At the end of this phase, I should have a preliminary technical documentation and for the sake of completeness I would like to ask members of this forums who currently have (or had in the past) specimens of this systems with issues with the boards if they would share their knowledge, as small it could be. That should help me prepare a list of malfunctions which would help me in getting some directions to achieve fixes for them.

Regards
Good for you! I had the option to pick one up in a pickup I was doing across state lines. But my car was already full and I was out of cash as the seller never mentioned it when were were negotiating. I already have an IBM 5120 but these things are just so interesting.
 
I have some progress to show today. I have built a cheap and dirty probe to use in the diagnostics port - and it actually worked quite fine.
Maybe with a BCD to seven segment driver the result would be better. I also have tested it by removing the memory board and the count stopped at 00000100, which is 4 in BCD and also the number of test routine for the first 16KB memory bank. In other words, this device allows the output of diagnostics if the video output is damaged or not present.
 
I have some progress to show today. I have built a cheap and dirty probe to use in the diagnostics port - and it actually worked quite fine.
Maybe with a BCD to seven segment driver the result would be better. I also have tested it by removing the memory board and the count stopped at 00000100, which is 4 in BCD and also the number of test routine for the first 16KB memory bank. In other words, this device allows the output of diagnostics if the video output is damaged or not present.
That should help speed things up a bit, ya a seven segment display would deliver a better status result of the system functioning state .
But still this step should still be a bit of a help for those who must do a manual diagnostic of the system without the CRT display(ing) information.
No real need to reply to this message.
 
Hello Nathan,

I would like to test the boards when I receive them, and then whatever the result is, share the appropriate files.

I now know why most of the the undocumented jumpers of the motherboard are a mystery... they don't actuate directly over logic but input ports instead. Their secrets lie in the firmware alone.
There is still an issue to solve to have a memory map of this machine, which is the placement of the video RAM and the character ROM. Both are 8KB long and would fit in a single page. In my opinion it would be very interesting to know where and how did they built the
At the same time, a prototype to replace ROMs 02 and 09 have also been ordered. The one for the rest of ROS memories is still being worked on, and don't know when will it be ordered. With a bit of luck, in about a month, I could have something decent.

Regards,
Jaume
 
Well then, until the results of your replacement memory boards are know, we leave it at that.
..
Yes the System 23 does have a lot of jumpers that are inputs used to control firmware features.
Chr$ Rom= Character Generator Rom.
..
Video RAM and Video ROM notes With a multimeter and some circuit race you could track that down, this would likely be quicker then disassemble all the systems firmware ROM chips.
Since this system uses a standard Intel CRTC Chip and a Chr$ rom that is in a standard pinout that should be very easy to do, but it still might take some time to complete.
The gating logic connected with the Sys 32 video system make take some time to decode it. The Chr$ rom is usually located close by the CRTC controller. (Hint)
The Chr$ rom is likely placed some ware in the CRTC Video Data space access, but the Video RAM could be multiplexed with the maim memory.
The language selection mechanism is likely like the extended Character set generator for the Sinclair ZX81, or is very similar to it.
Some ware their will be some data bits used in a register for this selection that logic on the system converts to a upper address selection bits for the Chr$ ROM.
..
The so called Word processor has the same CRTC Controller but no CHR$ ROM and it can have access to the 16K of dram that's on that board. To make things more complicated there where
cards that had more then 16Kof DRAM on them. The slave card for it is similar but no CRT Controller.
..
Well that is all for now.
And really there is no rush to reply to this message.
 

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Hello,

The prototypes arrived a few days ago. The ram boards are defective and a revised batch should be ordered. With other prototypes I had mixed results - but it has been my fault entirely. In any case, I have a simple rom patch for the memories 02h and 09h which works more or less accordingly to the plan, has been tested and after some revision it could become a long-term solution.


I hope this, in conjunction with the dumps at bitsavers can awake some Datamasters with the black screen. A patch for the rest of the roms is in its design phase and would be ordered in the next batch, as well as the corrected parts that were wrong in this one.
 
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