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Stopgap replacing Video ULA in BBC Micro

gertk

Experienced Member
Joined
Jan 26, 2016
Messages
431
Location
Netherlands
Hi,

My video ULA recently died in the BBC B here, no clock signals whatsoever, tried it in another BBC and no startup either.

I tried replacing it for testing with a GAL 16V8 generating the 4 clock signals(8/4/2/1 MHz), the CRT clock and the throughput/blanking of the SAA5050 RGB signals.

So far I managed to get the machine running albeit very unstable. The screen is somewhat glitchy and my cursor is one position off (to be expected).
But I do not understand why the computer is not running stable, it crashes after a few keystrokes for example.

The clock signals look fine on the oscilloscope, I tried altering the phase of CRTCLK (which in my GAL logic is synchronous and fixed to the 1 MHz clock signal output).
Even tried with an extra 16 MHz oscillator as input on the GAL but no diference. My understanding is that all clock stretching and such is done after the generation by the ULA.

Is there a detailed description of the ULA timing(s) including for example the phase between the clock signals available somewhere?

For now it would be ok just running in MODE 7 as that seemed the easiest mode to get going at first.
 
Small update:
I managed to get the BBC running with a 74LS161 for the clock divider instead of the GAL logic. Probably the GAL did not have enough drive or speed to push out the signals.
So far MODE 7 seems to work stable.
 
Small update:
I managed to get the BBC running with a 74LS161 for the clock divider instead of the GAL logic. Probably the GAL did not have enough drive or speed to push out the signals.
So far MODE 7 seems to work stable.

Which speed grade of 16V8 did you use?
 
FWIW, I've used GALs as clock dividers on some "toy" video generator projects and have had pretty good luck with them, including one that was also driving a 6502 CPU on the opposite phases from the video hardware, but I guess I can't say what might be going on in the BBC B that might make a difference. (Peeking at the breadboard it looks like it's all Atmel ATFs, a mix of 16v8s and 22v10s, 15ns.)
 
Which speed grade of 16V8 did you use?
I have used 25 ns ST's which always worked fine for other projects.

The newer 15ns Lattice 16V8 I have give an overcurrent error on the TL866 and my older GALprommer on the Atari TT does not recognize them.

I found out that the logic compiler on the Atari made a mess of the equations (actually the optimizing part did) and I tried my luck with GALasm on Linux.
Also using another 4 bit counter example from that repository. Alas the Beeb seems to startup ok but crashes again with sound effects and screen corruption.

This is the source of the 16V8 I have tried now:
Code:
GAL16V8    ; 4-Bit-Counter  first line : used GAL
BBC_ULA    ;                second line: any text (max. 8 char.)


CLK16 DISEN INVERT CURSOR NC NC BIN GIN RIN   GND
/OE   CRTCLK ROUT GOUT BOUT CLK8 CLK4 CLK2 CLK1  VCC

CLK8.R =  /CLK8


CLK4.R =  /CLK4 *  CLK8
       +  CLK4 * /CLK8


CLK2.R =  CLK2 * /CLK4
       +  CLK2 * /CLK8
       + /CLK2 *  CLK4 *  CLK8


CLK1.R =  CLK1 * /CLK2
       +  CLK1 * /CLK4
       +  CLK1 * /CLK8
       + /CLK1 *  CLK2 *  CLK4 *  CLK8

CRTCLK.R = CLK1 * /CLK2
       +  CLK1 * /CLK4
       +  CLK1 * /CLK8
       + /CLK1 *  CLK2 *  CLK4 *  CLK8


ROUT = RIN + CURSOR * DISEN
GOUT = GIN + CURSOR * DISEN
BOUT = BIN + CURSOR * DISEN

DESCRIPTION

this is a 4-Bit-Counter/divider for the BBC Micro

registered outputs are signed with the postfix .R
 
I was not sure about the CRTCLK part so I tried connecting it directly to the CLK1 (1 MHz) output (just as I did with the 74LS161) also but no change in the behaviour. Just Startup, type a few characters and crash, sound effects etc..
 
I have used 25 ns ST's which always worked fine for other projects.

The newer 15ns Lattice 16V8 I have give an overcurrent error on the TL866 and my older GALprommer on the Atari TT does not recognize them.
Well, the 74LS161 worked, and it's a 14ns part, so if you used a 25ns GAL, I'm going to guess that's why it doesn't work. I guess the 15ns 16V8s you have are dead. You could always try new production Atmel ATF22V10 15ns parts, but the older TL866 won't program them; you'll need a TL866-II.
 
Well, the 74LS161 worked, and it's a 14ns part, so if you used a 25ns GAL, I'm going to guess that's why it doesn't work. I guess the 15ns 16V8s you have are dead. You could always try new production Atmel ATF22V10 15ns parts, but the older TL866 won't program them; you'll need a TL866-II.
Yes, for now I leave in the 74LS161 as base clock generator. I added a 74LS157 for selecting RGB between Teletext mode and the other modes.
The first GAL is now used for selecting the control register (a 74HC573) and merging the CURSOR, DISEN and RGB signals coming from the LS157 (I think I can use some unused outputs from the first GAL as inputs for the RGB selection so the LS157 is free for the next step: palette writing.

I placed a second GAL as a selection switch for the various clock signals 16/8/4/2 MHz for the upcoming shift register and also for selecting the CRTCLK 2/1 MHz and that seems to work fine. Teletext mode is ok (apart from the shifted cursor) and when selecting another mode the monitor sync correctly too.

The shift register is planned to be a third GAL, a 20V8 as I need more inputs then there are available on a 16V8 (8 databits, a 'latch' input and a shiftclock input and tri-state outputs).
I tried finding a suitable TTL parallel in/parallel out shift register as the intermediate outputs are needed also but found none in my collection. So another GAL it is. I will try and use a 8 kByte (massive overkill) SRAM (cache) as palette storage. I have loads of these and they should be fast enough. Writing the SRAM will be a challenge though.
 
Making progress, all modes seem to work but still having some issues.
First the whole screen seems shifted a bit to the right and on the lefthand side there is a duplicated column from somewhere in the middle of the screen.
Palette writes are very time critical so it seems and is not fully stable yet.
2024-02-25 16.31.52.jpg
2024-02-25 16.37.49.jpg
2024-02-25 16.48.22.jpg
The hardware consists of three GAL chips, 5 TTL chips and a fast SRAM chip
2024-02-25 16.43.37-1.jpg
 
I have updated the GAL files and the schematic so the DISEN signal is delayed. Not perfect yet and the cursor still has to be delayed too.
 
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