What did I do to my PDP-8 today.

[Roland Huisman]

Hi Doug,

I have the M840K revision also. And that cap is C65 on the diagram which goes across the 4 diodes in series. It is definitely installed backwards.

Okay, good to know. You can check it better on that board.

How much could the 8881 do? I guess if you needed more drive you could sub a 74S38 since it can drive 60 ma. It doesn't look like the higher speed should be an issue on the application on this board.

The 8881 = 7439 can do 60mA at the output. But the bus is only pulled up for max 15mA.
(1K pull up at 15V limited by diode to limit on 3V. This is done to get a higher slew rate on the bus)
The higher current output chips have the strength to pull that 15mA to a really low level.

Since the 7401 is pin compatible with the 8881 and 7439 I would place one of these for testing.
If you want I can sent you a 7439 or an 8881 for shipping costs. But I don't know how things
are now regulated with shipping to the US...

Regards, Roland

 

[vrs42]

Doug, I do see the cut near BV2, though yours is further from BV2 than mine.

Trash got picked up today (yay!). The air quality index is better today (230+ vs 380+), so I guess it was a win for the Waste Management employees. (Jeanne says she can see the difference, though I hadn't noticed it.)

I think the 7438 is the better choice for new work, but for replacing the old part I'd go with 7439 if I had it, and 7401 in the meantime if not.

Vince

 

[Mike_Z]

Vince, put out those fires. Although the air quality here is not bad, the night skies are rather hazy. We had a blood red sun set last night. AND the other night I could only see two stars. Seems the jet stream is running over Oregon and Washington, looping into Canada and then dropping over MInnesota and Wisconsin carrying the smoke high up.

 

[DougIngraham]

Doug, I do see the cut near BV2, though yours is further from BV2 than mine.

I think the 7438 is the better choice for new work, but for replacing the old part I'd go with 7439 if I had it, and 7401 in the meantime if not.

BV2 is Power Ok on the Omnibus I think. What did they connect it to since that wasn't what they wanted?

I see now. The 7438 is what Roland was recommending for new or rather replacement designs. 7439 has the correct pinout. I have quite a lot of TTL. Not sure if I have a 7439 though. But no hurry as I have no plans to bring that reader into service at this time. I can get a new (in bag) one off of Ebay for a little over $5. Warren had collected a lot of parts, I have not inventoried them, it is possible I have tubes of them. One of these days. I suppose I can inventory them after I paint the house while watching the paint dry or something.

 

[vrs42]

BV2 is Power Ok on the Omnibus I think. What did they connect it to since that wasn't what they wanted?

After the rework, it's connected to the logic that detects the "out of tape" condition on the reader.
BTW, there's another tiny bit of rework that connects R28 to 5V, presumably disabling whatever that used to do.

I see now. The 7438 is what Roland was recommending for new or rather replacement designs. 7439 has the correct pinout. I have quite a lot of TTL. Not sure if I have a 7439 though. But no hurry as I have no plans to bring that reader into service at this time. I can get a new (in bag) one off of Ebay for a little over $5.

I had a look at the "ICs in tubes" tub. It seems I have several hundred 7439 here, in two bags (of tubes) that used to be 500 chips each.

Vince

 

[vrs42]

I did finish Eagle drawings of the DEC M840K. I haven't decided what to do about a "modern" version yet.

I have a number of questions about the bit of schematic attached. From the maintenance manual I gather that the circuit around Q2 models the ramp up of reader motor speed, affecting the clock rate to approximate the ramping motor speed.

Is there a discussion somewhere of what W1 and W2 do, and when I would install or remove them? I find the whole thing quite funky and I'm having trouble getting clear on what it does and how it works.

Both copies of the DEC drawings that I have are pretty crappy. I made a PDF from my drawing here:
http://svn.so-much-stuff.com/svn/trunk/Eagle/projects/DEC/Mxxx/M840/M840KSCH.pdf

Vince

 

[DougIngraham]

I have a number of questions about the bit of schematic attached. From the maintenance manual I gather that the circuit around Q2 models the ramp up of reader motor speed, affecting the clock rate to approximate the ramping motor speed.

Is there a discussion somewhere of what W1 and W2 do, and when I would install or remove them? I find the whole thing quite funky and I'm having trouble getting clear on what it does and how it works.

Both copies of the DEC drawings that I have are pretty crappy.

I may have found another crappy scan. http://www.vandermark.ch/pdp8/uploads/Hardware/Hardware.PC8E/pc8e.pdf

I didn't see anything specifying what W1 and W2 are supposed to do. Only that 22AWG wire is to be used for them. Best guess is the support of different models of the reader. I will keep an eye out for more...

 

[vrs42]

Vince, put out those fires.

It seems our hapless experiment with extensive cloud seeding has finally managed to cause rain in mid-September. It rained here the other day, and it's cleared up nicely since. Of course, fires are still out there, and the clearing weather suggests a resumption of the regular wildfire season. Only about 6 weeks to go until the rain resumes in earnest (for fall, winter, and spring).

Vince

 

[vrs42]

I may have found another crappy scan. http://www.vandermark.ch/pdp8/uploads/Hardware/Hardware.PC8E/pc8e.pdf

Um, yeah, that's about on par with what I had. You are meant to enjoy the PDF of the Eagle drawing, which is much easier to read .

I didn't see anything specifying what W1 and W2 are supposed to do. Only that 22AWG wire is to be used for them. Best guess is the support of different models of the reader. I will keep an eye out for more...

Near as I can guess, cutting them would lengthen one phase or the other of the clock signal. Perhaps cutting both works with some slower reader? I should hunt up the ECO document, and see if there is any insight there.

Vince

 

[vrs42]

For the 314 I used different approaches like a 74HCT05 (connect the open collector or open drain outputs
together and pull them up) or a 74HCT32 in combination with a 7427. (Check the RX8E clone that I made)
Very often there are some not used ports which can be very useful to solve a problem like the nasty 314.

I started down that path, but the possibilities for 380 and 384 replacement mangled the layout enough that it seemed the routing would have to be totally different.

When I got to the 314, I was thinking to replace the IOT decoding with something like the attached, which replaces 4 chips with two, I think.

Of course, the more of that I do, the less it looks like the original PC8E.

Vince

 

[DougIngraham]

Hey Vince. If you use a 74HCT238 you don't need to invert the outputs thus avoiding the sacrilege of using a 3 input nand as an inverter.

 

[vrs42]

Hey Vince. If you use a 74HCT238 you don't need to invert the outputs thus avoiding the sacrilege of using a 3 input nand as an inverter.

Probably true, but then I'd have wasted the 7410 gates, and would probably end up tying off the inputs anyway. There's also a pair of decoders breaking out the IOT operations later, and some trivial rework with a couple more 74138 in place of those eliminates the extra inversions.

More troubling to me was the departure from "re-implementing the PC8E with modern parts", moving toward "designing a PC8E work-alike". Feels like a slippery slope that leads back to the design where all the logic is just a single ATF1508. (I've got scripts to do the that, and more reliably than I can design stuff, already.)

Vince

 

[ftcnet]

I have spent some time with my lab pdp-8/a lately.

By using switching PSUs it is much lighter to carry around in the lab which is nice. But since it is an 8A100 chassis it lacks the E-connector to support hex wide core memories. I did put a 20V PSU and a -5V PSU from the very beginning so it has now become time to create that little board that should be sitting where there are two holes to the right in the chassis.

I spent some time yesterday working on the CAD layout for the board that would hold five ECS connectors. I also included the four bank select lines to allow for 128 k memory.

That looks like a very nice replacement for the DEC G8018 PSU. Can you share any additional details (sources, part #'s, wiring diagram, etc..)?

 

[vrs42]

Well, once I gave up on the routing problem (used the autorouter), making a "modern" PC8E board in the spirit of the old didn't turn out to be so bad.

Mainly I used 74HCT30 gates instead of the 314 gates, which meant I didn't need so many inverters. The other changes are more or less what Roland had suggested. I did switch to LS138 decoders, as those are much easier to find. Here's a PDF schematic if anyone cares :
http://svn.so-much-stuff.com/svn/trunk/Eagle/projects/DEC/Mxxx/M840/M840X.pdf

It may even be similar enough to the original design to "just work".

Vince

 

[MattisLind]

That looks like a very nice replacement for the DEC G8018 PSU. Can you share any additional details (sources, part #'s, wiring diagram, etc..)?

Don't really have a very good list. Just the screen shot of the Aliexpress purchase. The PSUs are cheapo chinese made PSUs. But it do seems to work just fine.

The 24V supply was modified to supply 20V by changing a resistor. I had to create my own PWR OK circuit since the one on the small board in the back was removed to fit all the supplies. The M8316 board was not happy without a proper PWR OK signal generated after 5V got OK.

 

[vrs42]

Plugging along on PDP-8 projects...

Today (well, yesterday) I finished drawing the M8300 Major Registers board:
http://svn.so-much-stuff.com/svn/trunk/Eagle/projects/DEC/Mxxx/M8300/

The schematic is a bit of a departure from the DEC drawing, as I don't have the flexibility to draw implementation detail for the chips, etc. So mine is organized to do all 12 bits of a particular function on the same sheet. (I actually think that is also a little easier to follow.) The board drawing is meant to follow the E schematic implemented on the B etch quite closely.

I also did a quick CAD drawing of the metal bit of the 8/I Bezel:
http://svn.so-much-stuff.com/svn/trunk/3D/8IPanel/

Last week with Bill and Rick's help I repaired my archive of decus-8-889 , which is an early implementation of ADVENTURE. Latest ADVENT source and binary can of course be found on Rick's site. Bill is working to reconstruct the historical timeline:
http://svn.so-much-stuff.com/svn/trunk/pdp8/src/decus/8-889/
https://www.rickmurphy.net/advent/
https://poetnerd.com/pdp8-alive/advent/timeline

Also cleaning up my inventory of parts and whatnot. Got labels on the the "chips in tubes", got some of the other parts moved to new parts bins that fit on a shelf where I can reach them, etc.

Vince

 

[MattisLind]

I made my Omnibus hardware debugging station ready. The programmers console mounted above the real chassis to allow for accessing the boards on extenders. The slot E connectors in place.

First object to reapir was 8k memory stack. When measuring on the boards I found all memory signals quite weird. So I had to start debug the CPU board. A 74S74 in the memory timing system on the CPU had gone bad.

But the memory boards didn't start working just because of that. Now it was failing more consistently returning just 0 what ever I read out. Previously I got random data.

 

[DougIngraham]

Ok, been a while!

In the summer 1976 I wrote an 8080 emulator for the PDP-8 because I couldn't afford enough ram to make the 8k MITS BASIC run on my Altair. I used the DF-32 as the backing store for the 8080 memory and Field 1 was the cache for the 8080 ram. I got it mostly debugged and it would sort of run Basic. But I never managed to figure out what the bug was. In 2016 a friend was cleaning out his stuff and ran into a box of pdp-8 paper tapes which he sent me. A copy of my 8080 emulator source tape (4 inches thick fanfold) was in there. It became a project to figure out what was wrong. Eventually I found that under certain circumstances one of the 8080 instructions left the PDP-8 link set and then when the 8080 RAL instruction was the next instruction executed the 8080 carry bit was wrong. I had to change the RAL to a CLL RAL and that fixed it! It was several months of evenings to find this and I was greatly helped by the internet which I didn't have in 1976. Anyway, all that was a couple of years ago.

Last night I was thinking about this program again and came up with a possible speed up. My original code was about 1/100th of the speed of an 8080 assuming a cache hit. I felt this was not too bad and the MITS basic was even sort of usable. With several weeks of evenings I was able to get this to just under 1/60th of the speed of an 8080 although part of that was taking advantage of having 32k of memory on the pdp-8. A big portion of the speedup was pre-calculating a table to generate the 8080 flags so instead of calculating parity on the fly I could just look it up. Here is a piece of the original code:

/THIS IS THE MAIN PART OF THE SIMULATOR
*0170           /ADJUST THIS SO ORIGIN IS AT 0177
/THIS SECTION FINISHES UP FLAG PROCESSING
/VALUE TO USE TO SET THE FLAGS IS IN AC
SETFLG, TAD Z FLGTBL    /MAKE PTR INTO TABLE
        DCA Z LTEMP     /MAKE INDIRECT POINTER
        CLA IAC         /KEEP THE CURRENT CARRY BIT
        AND Z FLAGS
        TAD Z ICRRY     /ADD IN THE AUX CARRY
        TAD I Z LTEMP   /ADD IN NEW FLAGS
        DCA Z FLAGS
/PLACE THE MAIN LOOP AT THE LAST LOCATION IN PAGE 0 SO WE CAN JMP DIRECTLY HERE
/WARNING: SELF MODIFYING CODE
ORIGIN, NOP             /NOP IF INTS DISABLED OR JMS I Z DOINT IF ENABLED
/       JMS I TRACE
SKPINT,

For instructions which need to set the 8080 flags register we finish them with a JMP Z SETFLG and for those that don't we JMP Z ORIGIN. We place this code on page 0 because you can jump directly there without having to do an indirect jump. The NOP at ORIGIN will get replaced when the 8080 interrupts are enabled with a JMS to the interrupt handling code. My change is to replace all the JMP Z ORIGIN instructions with JMP I Z ORIGIN. ORIGIN will become a variable on page zero and be set to SKPINT if interrupts are disabled or no interrupt is pending and to the interrupt routine if an interrupt is pending. The timing for this is exactly the same because the indirect portion of the JMP I takes the same time as the NOP to execute. Unfortunately, the SETFLG portion of code can no longer fall into SKPINT because this would avoid the processing of an interrupt. This means that for those 8080 instructions which set the flags the execution time is going to be one JMP I Z ORIGIN longer which is 3 microseconds on my Straight 8. I could eliminate this by appending the SETFLG code sequence to the end of all the code that jumps to it so I might do that. In that situation it becomes time neutral. So why would I consider this? It has always bothered me that the program does not start at 0200 and cannot start there. This change would remove the requirement that the instruction fetch portion of the code be placed at the end of page 0 and would allow me to start the program at 0200. It also eliminates the self modifying code when interrupts are enabled. And it makes interrupt processing a bit easier to understand. Since I don't have any interrupt code in the thing currently I will probably leave this until such time as I add it.

Coming RSN (Real Soon Now was trademark phrase of Jerry Pournelle when he was writing for Byte Magazine) I am going to fire up Fusion 360 and work on an easily printable PDP-8/e handle design. Maybe even start on this tomorrow.

Stay safe everyone!

 

[vrs42]

In the spirit of "What have I been working on lately?":

I've been going through various lists of PDP-8 software, creating a huge list (maybe someday a "master list") of titles.

Here's a preview of what I've got done so far: http://svn.so-much-stuff.com/svn/trunk/pdp8/src/xx/xx.php
with clickable links to the actual stuff, if I have already found it.

I still have much work to do from the maindec area onward, as well as over 120 missing titles in the PDP-12 segment to add to the list (not to mention rounding up the actual files).

I do think (hope) the "dec-08" section is mostly complete.

Vince

xx is a dumb name -- consider it temporary.

 

[vrs42]

I've been going through various lists of PDP-8 software, creating a huge list (maybe someday a "master list") of titles.

I've continued to putter with my giant list, trying to get to where I have all or most of the DEC PDP-8 software listed. At this point the "hit rate" for duplicates when adding new swaths of stuff is up around 90%. (So each time I go to add a pile of stuff about 10% is stuff that, amazingly, *wasn't* in any of the other lists or collections.)

Anyway, there are 1329 titles so far, and 2328 known files, of which 1013 are linked, which means I have actually got a copy of that file. I still have a pile of Googling to do, as I want to get to at least 50% of the DEC stuff known to ever have existed!

This version fleshes out the PDP-12 stuff, more option manuals, etc. Still at:
http://svn.so-much-stuff.com/svn/trunk/pdp8/src/xx/xx.php

There's some amazing stuff in there that I never even knew existed!

Also, please let me know if you have (or even just know about) stuff that isn't linked (or listed).

Vince