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XMS memory problem.

prime

Experienced Member
Joined
Sep 20, 2009
Messages
153
Location
Coventry, UK
Hi all,

I've been designing a 16 bit XMS board for use on AT class motherboards that have limited onboard expansion. For example I have a Commodore PC-40-III that can only have 1MB onboard.

The board currently consists of between 2 and 8 AS6C4008-55PCN 512K x 8 bit SRAMs (one each for the high and low byte), the databus from these is buffered by a pair of 74HCT245s connected to the appropreate high/low bytes select lines (SBHE and A0) A1..A19 are connected to the RAMs A0..A18. I also have an XC9572XL CPLD on the board which does the decoding and selecting of each bank of RAM.

The CPLD code for slecting the buffers / RAM chips and asserting the MEMCS16 line to the motherboard, was developed by studying the schematcs for the IBM AT RAM cards, but obviously modifying for SRAM rather than DRAM.

Now this all appears to work, the BIOS** of the machine sees the RAM and I can run various RAM tests (Checkit 3, NDIAGS) against it which report no problems. Loading himem.sys works and it sees and reports the memory in the dos MEM command. However if I try to run with DOS=HIGH the machine crashes, alternately if I load dos low and try to run Windows 3.0 / 3.1 it hangs on the splashscreen. So I suspect that there is a problem running code out of the memory?

**Checked with The Commodore PC-40, 2.03, and IBM AT (8MHz) Both the IBM BIOS, and the AMI BIOS, plus a no-name baby-AT 286 16MHz also running AMI.

Does anyone have any idea what the problem could be? I personally suspect a timing error.

Cheers.

Phill.
 
When you say you've run the Checkit3 memory test, have you run the "long" version of the test or just the quick one?

I guess my most basic guess would be maybe there's an issue with the SBHE logic and it's blowing up for non-aligned memory access but works on 16 bit aligned... but maybe that's not a great theory.

Sanity check: in your chip select circuitry are you latching on BALE? (I assume for the address lines actually connected straight to the RAM chips you're using the normal latched SA** lines) That part of the "IBM PC AT 512k-2MB" memory card schematic is probably about the hardest to follow because of that funky redirect it takes through that PROM, I'm wondering if it's possible your circuit missed that, so the same memory chips are getting accessed for multiple pages of memory. (A really simpleminded quick memory test might miss that.)
 
When you say you've run the Checkit3 memory test, have you run the "long" version of the test or just the quick one?

Yeah the long version that does several tests checkerboard, walking left, walking right etc. The Norton NDIAGS also does similar. I've currently got it doing the NDIAGS comprihensive test but that's gonna take 16 hours :)

I guess my most basic guess would be maybe there's an issue with the SBHE logic and it's blowing up for non-aligned memory access but works on 16 bit aligned... but maybe that's not a great theory.
[/quote[
But something worth double checking :)

Sanity check: in your chip select circuitry are you latching on BALE? (I assume for the address lines actually connected straight to the RAM chips you're using the normal latched SA** lines) That part of the "IBM PC AT 512k-2MB" memory card schematic is probably about the hardest to follow because of that funky redirect it takes through that PROM, I'm wondering if it's possible your circuit missed that, so the same memory chips are getting accessed for multiple pages of memory. (A really simpleminded quick memory test might miss that.)

Yeah following the IBM circuit MEMCS16 is driven directly from the (un-latched) decode of LA[23:20] but the RAM chip enables are latched** The 512K / 2M IBM board has the PROM, but there are circuits for smaller boards that don't uses it and decode entirely in logic without a PROM e.g. the 512K-640K board.

http://minuszerodegrees.net/5170/cards/5170_cards.htm#128_meo

** The actual logic is that the decodes follow the inputs when ALE is high, and ale latched while it is low, this matches the ALS573 on the IBM schematic's behavior.

Cheers.

Phill.
 
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