jackrubin
Veteran Member
Will one of you kind people please explain to me how to read Mattis' logic analyzer output above?
Thanks!
Jack
Thanks!
Jack
Which of them?Will one of you kind people please explain to me how to read Mattis' logic analyzer output above?
Thanks!
Jack
I have seen that possibility, but I have presently no running computer with 3.5" floppy disk connected. There is a guy that has made a small PIC based PCB that emulates a IEEE488 drive with a SD card. I am about to solder it together and use it instead. Until then I have to stay with this old fashioned hardcopy method...Cool info. I assume you know that for documentation purposes you can print screen to disk on the logic analyzer (or FTP a copy of the screen if you have the Ethernet option) and then you would have a clearer and smaller file to post instead taking a photo of the screen. Although taking a photo might be the quicker method.
Can't say I fully understand what is in each captured screenMattis,
AHA! Once I better understood the bit ordering and spent enough time with the TU60 manual to realize I was looking at phase encoding, things became much clearer. Now back to the manual and schematics to untangle the CRC process.
As always, thanks to all of you on the forum for sharing your knowledge and experience!
Jack
BTW, please tell us more about the GPIB-SD project.
Initially I bought this HPIB PCB to use with a HP9000/310 computer that I have. I thought it could be used with the HP1664A as well. Maybe it isn't? I had the impression it did since the HP1630 seems to be capable to do it. But I cannot find anything in the manual about HPIB disks so I guess you're right! I guess that then my only option then to put together my old computer with a 3.5" drive or continue using a camera.I wasn't aware that the HP 166x series logic analyzers could use an HPIB disk drive. I thought they could only connect to a GPIB controller or printer. Let us know what you find.
Well, there is a this guy, Anders, that announced this project on a Swedish forum site. I looked at his website and found it very interesting since I have a couple of HP9835/HP9845 calculators as well as a HP9000/310 computer. He had a spare PCB board that he sold me cheap. So now I have to populate it with ICs and discrete components. Then I also wrongly thought I could make use of it with my Logic Analyzer. But apparently HP removed that feature in later models of their analyzers.Mattis,
BTW, please tell us more about the GPIB-SD project.
@
007574 006574 006774 170617
@DD
CLEARING MEMORY
CHMDDA0 XXDP+ DD MONITOR 8K
BOOTED VIA UNIT 0
ENTER DATE (DD-MMM-YY):
RESTART ADDR:033726
50 HZ? N Y
LSI? N
THIS IS XXDP+. TYPE "H" OR "H/L" FOR DETAILS
.D
ENTRY# FILNAM.EXT DATE LENGTH START
000001 HMDDA1.SYS 22-MAR-80 17 000050
000002 HDDDA1.SYS 22-MAR-80 3 000071
000003 HUDIA0.SYS 22-MAR-80 6 000074
000004 UPD1 .BIN 22-MAR-80 12 000102
000005 UPD2 .BIN 22-MAR-80 16 000116
000006 HELP .TXT 22-MAR-80 26 000136
000007 HSAAA0.SYS 22-MAR-80 24 000170
000010 SETUP .BIN 22-MAR-80 26 000220
000011 GKAAA0.BIC 1-MAR-89 14 000252
000012 GKABC0.BIC 1-MAR-89 15 000270
000013 ZTAAC0.BIN 11-AUG-76 16 000307
000014 ZTABC0.BIN 11-AUG-76 17 000327
000015 ZTACC0.BIN 11-AUG-76 13 000350
000016 ZTADC0.BIN 11-AUG-76 16 000365
000017 ZTAEB0.BIN 11-AUG-76 13 000405
000020 ZTAFC0.BIN 11-AUG-76 2 000422
000021 ZTAHA0.BIN 11-AUG-76 6 000424
000022 ZKLAE0.BIC 11-AUG-76 14 000432
000023 ZDLAF1.BIN 12-MAR-77 17 000450
000024 ZDLBB0.BIN 11-AUG-76 16 000471
000025 ZDLCA0.BIC 11-AUG-76 19 000511
000026 ZDLDA1.BIC 29-JAN-77 19 000534
000027 ZDLOC0.BIN 17-AUG-76 4 000557
000030 ZKWKA1.BIC 29-JAN-77 27 000563
.R ZTABC0
MAINDEC-11-DZTAB-C
SWR = 000000 NEW =
TESTING DRIVE A
|
END PASS
TESTING DRIVE B
`
END PASS
TESTING DRIVE A
`
DATA PROBLEM
PC TACS EXPECT RCV'D
010470 000004 000377 000122
x
END PASS
TESTING DRIVE B
`
END PASS
TESTING DRIVE A
`
000000 177500 001056 016632
@DD
CLEARING MEMORY
CHMDDA0 XXDP+ DD MONITOR 8K
BOOTED VIA UNIT 0
ENTER DATE (DD-MMM-YY):
RESTART ADDR:033726
50 HZ? N Y
LSI? N
THIS IS XXDP+. TYPE "H" OR "H/L" FOR DETAILS
.R ZTAEB0
MAINDEC-11-DZTAE-B
SWR = 000000 NEW =
DRIVE A AND DRIVE B WILL BE TESTED
*** FORMAT *** DRIVE A
001612 000000 001056 011646
@DD
CLEARING MEMORY
CHMDDA0 XXDP+ DD MONITOR 8K
BOOTED VIA UNIT 0
ENTER DATE (DD-MMM-YY):
RESTART ADDR:033726
50 HZ? N Y
LSI? N
THIS IS XXDP+. TYPE "H" OR "H/L" FOR DETAILS
.R ZTADC0
MAINDEC-11-DZTAD-C
SWR = 000000 NEW =
TESTING DRIVE A AND DRIVE B
WRITE-FILE-GAP
IMPROPER FLAG OCCURRED
TEST ERROR
PC PC TACS TADB
005636 010562 120140 000017
END PASS
TESTING DRIVE B AND DRIVE A
READ
SHORT RECORD
TEST ERROR BYTES
PC PC TACS TADB LEFT
004742 011204 140144 000350 000006
BUFFER COMPARE
BAD DATA READ
TEST ERROR EXPT'D RCV'D BYTE
PC PC TACS DATA DATA NUMBER
004746 010512 140144 000314 000357 000001
END PASS
TESTING DRIVE A AND DRIVE B
END PASS
TESTING DRIVE B AND DRIVE A
END PASS
TESTING DRIVE A AND DRIVE B
END PASS
TESTING DRIVE B AND DRIVE A
END PASS
TESTING DRIVE A AND DRIVE B
END PASS
TESTING DRIVE B AND DRIVE A
Ok, with a little help from my friends a was able to locate new rubber for the drive spindles. Both of them. I now have ran ZTABC0, ZTADC0 and ZTAEB0 diagnostics. The first two run fairly well. But the last one doesn't even start. It just sits there forever until I hit INIT. The thing is that the documentation for ZTAE?? is for the C0 version rather than the B0 version that I have here. Is there a bug somewhere?
Mattis,
I have don't have time to fully explain, but ZTAEB0 has a bug. I can't rememebr where on the internet, but I wrote up the patch. There needs to be a missing CLR PS added that you will see in the C0 listing at 002016. without it the PSW priority stays at 7 and ignores the #6 priority of the TA11.
@CT
000000 040000 000466 020002
PRELDR is the first record of the first file on the System Cassette. This cassette pre-loader is actually a small program written in "CBOOT Loader Format" which is powerful enough to determine memory size and load succeding programs into highest memory. It is linked, loaded, and started automatically by CBOOT at location 0. A map of CAPS-11 memory now appears as shown in Memory Map #2 of Figure E-3."
> 000000 nop
> 000002 br 000010
000004 .word 000030
000006 halt
> 000010 mov #000500,sp
> 000014 clr r4
> 000016 mov sp,r5
> 000020 tst (r4) < causes trap 4/6 as part of memory sizing
> 000022 add #020000,r4
> 000026 br 000020
> 000030 mov #000130,r3
> 000034 clr r2
> 000036 mov #000200,r1
> 000042 movb #000005,(r0)
> 000046 jsr pc,(r3) > label_1
000050 movb 000002(r0),(r5)+
000054 jsr pc,(r3)
000056 dec r2
000060 bmi 000112
000062 bne 000072
000064 mov sp,r5
000066 mov r1,r2
000070 dec r2
000072 dec r1
000074 bne 000050
000076 bisb #000020,(r0)
000102 jsr pc,(r3)
000104 tst r2
000106 bne 000036
000110 jmp (r4)
000112 bit #000001,r5
000116 bne 000072
000120 mov -(r5),r2
000122 sub r2,r4
000124 mov r4,r5
000126 br 000072
> label_1 000130 bit #100240,(r0)
> 000134 beq 000130
000136 bmi 000142
000140 rts pc
000142 mov (r0),r4
000144 halt
000146 tst (sp)+
000150 movb #000007,(r0)
000154 jsr pc,(r3)
000156 movb #000015,(r0)
000162 jsr pc,(r3)
000164 inc (r0)
000166 jsr pc,(r3)
000170 br 000010
000172 swab @-(sp)
000174 rol r2
000176 swab @-(sp)
.DI
--
CTLOAP SYS 19-FEB-14
CAPS11 S8K 25-NOV-13
DEMO PAL 25-NOV-13
EDIT SLG 25-NOV-13
LINK SRU 25-NOV-13
ODT SLG 25-NOV-13
PAL SRU 25-NOV-13
PIP SRU 25-NOV-13
?NO SENTINEL FILE
?SYNTAX ERROR
.
Is PRELDR relying on that the CBOOT is located at 001000? My HW boot is in PROM of course.
010000 051415 177714 000002
@CT
CAPS-11 V01-02
.DA 27-MAR-14
.DI CT1:
27-MAR-14
CTLOAD SYS 07-JAN-75
CAPS11 S8K 07-JAN-75
PIP SRU 07-JAN-75
EDIT SLG 07-JAN-75
LINK SRU 07-JAN-75
ODT SLG 07-JAN-75
PAL SRU 07-JAN-75
BASIC LDA 07-JAN-75
.
TO +1 IF HIGH TEST
DCA TEST
TAD TABNO
AND P777
DCA TABNO /SAVE TABLE NUMBER
TAD LTAB
DCA TCORE /SET CORE ADDRESS
CLL
CIF
JMS I TABLE /READ LIMIT TABLES
TABNO, 0
TCORE, 0
CLA CLL
CDF
TAD I BAND1 /FETCH
NUMBER OF
DCA B1 /CHANNELS FROM MEM0
TAD I BAND2
DCA B2
JMS I RSETDF
IAC
JMS COMWRD /FETCH BATCH TRAIN NO
SPA CLA /RELOCATE OUTER BAND?
JMP INNER /NO - INNER
DCA CHNO /YES - SET 1:ST CHANNEL NUMBER
TAD B1 /FETCH CHANNEL COUNTER
JMP BOTH
INNER, TAD B1 /CALCULATE FIRST CHANNEL NO
CIA
DCA CHNO
TAD B2 /FETCH CHANNEL COUNTER
BOTH, DCA CHCNT /SAVE COUNTER ON PAGE ZERO
TAD P5
JMS COMWRD /FETCH CHANNEL NUMBER
SNA /ZERO?
JMP ALL /YES - TEST ALL ON ONE BAND
TAD M1 /NO - SAVE CORRECT
DCA CHNO /CHANNELNUMBER
TAD M1
DCA CHCNT /SET COUNTER TO -1
SKP
SINGLE, CLA IAC /SET AC TO 11
ALL, TAD P10 /SET AC TO 10
JMP I RELO /RELOCATE
ACLEAR, DCA I TEMP /CLEAR RCLEAR IN COMMAND BUFFER
ISZ TADDR /SET POINTER TO CORRECT
CDF /ADD TERM IN TBTAB
DCA I TADDR /ZERO ADD TERM
JMS I RSETDF /RESET DATA FIELD
NOP
CMA
DCA QCPFEL
JMS I DCWAIT
TAD QCP /INDICATE READY
CIF
CLL
JMS I MONDSC /RETURN TO QCP
HLT /SECURITY HALT
COMWRD, 0 /ADD TERM IN AC
TAD COMAND
DCA TEMP /ADDR IN COMAND BUFFER
TAD I TEMP /FETCH COMAND WORD
JMP I COMWRD /TO AC AND RETURN
/CONSTANTS:
BAND1, 66 /PAGE0, MEM0
BAND2, 67 / " "
B1, 0
B2, 0
TEMP, 0
P3, 3
P4, 4
P5, 5
P10, 10
P50, 50
P51, 51
P52, 52
P54, 54
P55, 55
P77, 77
P777, 777
P3777, 3777
P6000, 6000
M1, -1
M2, -2
M2001D, -3721
QCP, 4023 /AUT
OSTART QCP
$
tingo said:Progress! Well done!
Lou - N2MIY said:Congratulations. Now there's another of us running CAPS-11!
On my 11/04, instead of patching the secondary loader to work without a hardware switch register, I built my own hardware switch register : http://www.vintage-computer.com/vcfo...achmentid=7062