A possible CPU upgrade on a PS/2 Model 25/286 - 12Mhz / Zero wait?

[Simplethings]

I have been doing some pondering over the schematic for the PS/2 Model 30/286. It's about the same thing as my model 25. I have noticed a few interesting things:

The chipset is a VLSI VL82CPCAT-QC and is capable of 12Mhz operation and zero wait states with 80nS RAM. :


The PS/2 Model 25/286 and model 30/286 both operate at 10Mhz with 1WS.

The VL82C101B System controller in these systems is what takes the 20Mhz Osc and splits it to 10Mhz (the speed our PS/2's run at)



The RAM Wait state is enabled by pin 18 on the system controller:


On our PS2 machines pin 18 is hardwired to 5V, thus wait state is always on. FASTMODE is also always off. I'm not 100% How these work, but the datasheet for the chipset says it can run zero wait state at 12Mhz (our ps/2's are 10Mhz) with 80nS RAM. The stock PS2 ram is slow and can't run at that speed, but my computer is expanded to 4Mb with 80nS SIMMS.


I'm considering a few experiments, but I really don't want to destroy my PS/2. Has anyone attempted to travel this path before?

I'd like to try a few things. I have access to micro / mini level component repair and modification.

1) I'd like to switch the system controller osc from 20Mhz to 24Mhz and see if my PS/2 can run at 12Mhz. I'll probably buy the original style CPU at 12Mhz (they seem to be cheap and plentiful)

2) I'd like to make a jumper or switch of the wait state and fast mode setting.

If anyone is wondering "Why" it's kind of a pet project. I love the form factor, but the PS/2 model 25/286 is marginally faster than my 8086 with an NEC V30. With real VGA graphics, my ISA soundblaster 16, and 4MB of RAM I feel like this system is lacking just a touch of "oomph" in the processing department.

I don't want to post links so I don't get auto banned but I found the PS/2 model 30/286 schematic on google and the VLSI chipset info in a PDF document called VTI computer products 1989.

 

[Chuck(G)]

I suspect the original 10MHz 80286 will run at 12MHz--the garden-variety 80286s had quite a bit of leeway in the specs.

Getting the RAM to run at 0WS may be a bit trickier, however.

 

[Simplethings]

A book from another motherboard that used this same chipset would be a huge help. I'd like to see configuration options for boards that did either zero or one wait state. Other than the Ram speed what else would cause a need. The memory controller is part of the same chipset.

 

[nztdm]

Half successful

Half successful

Hey, I thought I'd post the results of doing some of this.

I have a PS/2 Model 30-286.
I switched Wait-State OFF, and it showed a moderate to large performance improvement in some benchmarks, but CheckIt 3.0 always corrupted then crashed when I tried to navigate its menu. CheckIt works perfectly with Wait-State ON like default.
I also have 4 x 1MB 80ns SIMMs like you.
Mine is the stock Intel 80286 10MHz.
I didn't try FASTMODE because I didn't understand the description: "If FASTMODE is desired, the pin must be held low until after the first memory read cycle."

I can think of some possible reasons for the instability with Wait-State Off:
> It requires 12MHz CPU. I couldn't tell from the datasheet if this was true or not.
> This motherboard isn't stable with Wait-State Off for some reason. The reason it is hard-wired ON can be assumed because of IBM's typical minimal-configuration proprietary nature with the PS/2 line.
> My SIMMs are not stable 80ns SIMMs, even though all the chips on them are 80ns rated. Here's a pic of mine:


I will try the following eventually:
> Add small 6-way DIP switch / crystal board with settings for:
>> 10MHz, 12MHz, 12.5MHz, 13.5MHz, Wait-State, Fast-Mode.
> Try other SIMMs if I can find any of the rare PS/2 type ones (or modify some as seen here [if the modified ones work in a 30-286 and not just the SCSI card]: http://john.ccac.rwth-aachen.de:8000/misc/ps2cache/ ).

 

[nztdm]

Follow up to my previous post.

Have made the board with 6-way DIP switch as described above.



Results:

Fastmode Enabled: Error 201 (Memory Error) at a random location on boot. Tried 80ns and 70ns memory.

Wait-state Disabled:
10MHz: Performance improved but unstable.
12MHz: FFF0 201 Error

Default fastmode and waitstate (just changing CPU freq, with 10MHz rated CPU):
10MHz: This is stock.
12MHz and 13.5MHz: Expected linear performance increase. Currently testing for stability; seems fine.


The performance increase from disabling the waitstate (until I try CheckIt and make it crash) was similar to going from 10MHz to 13.5MHz, so I imagine the performance would be much greater with waitstate disabled AND 13.5MHz.

 

[maxtherabbit]

necro time!

Does anyone know exactly what FASTMODE does? Is it for FPM DRAM?

 

[WarhammerTH]

Hey guys, maybe my answer is little late, but currently i'm working at the same board.

I found some interesting information about FASTMODE in the dokument "VTI computer products 1989" posted above.

Page 7-10 and 7-11 they show how to use FASTMODE.
The use a RS-Flipflop to set FASTMODE to 1 after first XMEMR. "If FASTMODE is desired, the pin must be held low until after the first memory read cycle."
Sorry for my great paint skills

Maybe this is interesting information for some of you.

Kind regards.

 

[pipmastah]

"Necromancing" this thread once again. A wise man once told me it's not an actual necro if new, useful info is added

I've been tinkering with my Model 30-286 planar as well and today I found out that the stock parity logic isn't able to operate at the highest clock speed setting this chipset supports, which is a blazing fast 12MHz! ;-)
Mine would run like crap at that clock speed as well initially, even with 80ns memory but after I managed to disable parity things changed and now it runs rock solid at 12MHz, which is a nice 20% linear performance increase. All you have to do is cut the 2 "PAREN" (PARity ENable) traces lading to the VL82C102 and the VL82C104 chips which will result in that signal being pulled to ground, disabling parity control and of course replace the stock 10MHz crystal with a 24MHz one.

Next I'm going to try 0WS read mode and maybe take out one ROM WS as well as I have a faster ROM chip installed and if that will result in a stable 12MHz 0WS system I will finally pop in my 40MHz 486 upgrade CPU with 8k of L1 cache. My goal is to build one of the fastest Model 30s, being a huge fan of the system which I have been using for 30 years Will keep you guys posted!

 

[mbbrutman]

Except for a toy benchmark I would never purposely disable parity checking. These machines are difficult enough to debug when they misbehave; parity checking is a line of defense and a debug aid for RAM. Without it you can be getting silent memory corruption and when you are unlucky it will corrupt your file system.

 

[pipmastah]

You can do what you want; or not do what you never would to your own machines in this case and I will do so with mine. A corrupted file system is simply of no concern to me. That's would just a temporary hickup which is easily fixed. It's supposed to be fast and stable like all systems I build and modify, not at all a "toy benchmark" to use your kind words. I guess you don't appreciate the amount of work and testing that goes into projects like these. And it's not as if this machine is used for important scientific calculations or anything. Also I don't find these machines particulary difficult to debug ;-) Older 286 systems like the IBM XT-286 (5162) are way way harder to debug because of all the discrete logic. This thing is highly integrated and its VLSI chipset very well documented..

The Model 30-286 planars in fact have heaps of reserves in terms of performance and are designed to be dog slow from the factory in order not to compete with IBM's more expensive MCA based 286 systems like the Model 50.. They actually allow for 12MHz zero wait state operation instead of 10MHz 1 wait state operation so these VLSI chipsets definitely have way more potential than their stock configuration allows for and the parity controller is just a weak link in this case so it simply needs to go. It's as simple as that.
Also I have yet to experience data or memory corruption caused by disabling parity checking. I have in fact overclocked heaps of machines that didn't even have a parity controller to begin with and when I was done they all ran fine without any corruption whatsoever.. You just have to know what you're doing.

The first thing that usually happens when overclocked too far is system instability will suffer and you're more likely to experience random resets and a non-POSTing machine than file system corruption. And as if file system corruption would be such a big deal. If I would witness this for the first time in 30 years I'll just tune it down a bit and pop in another storage device untill it's stable. Trust me: I know what I'm doing. I have studied the white paper for this chipset and I ran this system for 24 hours with an infinite memory test-loop and it's rock solid at 12MHz with its parity controller disabled.

 

[JvV]

Next I'm going to try 0WS read mode and maybe take out one ROM WS as well as I have a faster ROM chip installed and if that will result in a stable 12MHz 0WS system I will finally pop in my 40MHz 486 upgrade CPU with 8k of L1 cache. My goal is to build one of the fastest Model 30s, being a huge fan of the system which I have been using for 30 years Will keep you guys posted!

Keep us posted!

 

[mbbrutman]

Just to be clear, I said "a toy benchmark", which was not specific to you or your project. So I'm not sure what you are getting defensive about.

Parity checking is one way to determine if you have bad memory. My favorite machine doesn't have it so I'm well aware of the challenges of debugging system problems without it. If you don't care about memory corruption or the data on the machine, then good luck. Personally I hate corrupted filesystems because I care about my data; I'm serving web pages from a 4.77Mhz machine without parity memory. The goals are different.

 

[pipmastah]

I get defensive because I find the "toy benchmark" comment a bit pointless. What else would you be refering to? It's a direct reply to my post.
There's nothing wrong with the idea of keeping parity checking enabled if that's your MO. But I personally do not mind disabling it if it stands in the way of a significant performance boost while keeping the machine rock solid. And I absolutely do care about avoiding memory/data corruption which is why I make sure that it cannot and will not structurally occur, at least not as a direct result of overclocking the system.
Overclocking is not about gaining the most performance at all cost. It's about finding that sweet spot at which the machine runs significantly faster while still being solid as a rock. The Model 30-286 is one of those machines that has big reserves.. at least I hope so ;-)

 

[mbbrutman]

"Toy benchmark" is not an insult, it's a technical term. Look it up.

I merely said I wouldn't trust the machine to do anything except a toy benchmark, as per the definition of a toy benchmark. And turning off parity checking makes it more difficult to determine how "rock steady" the machine is.

 

[pipmastah]

Ok, I've must've misunderstood. Sorry about that

It's more difficult indeed to troubleshoot with parity disabled but having a parity controller that cannot keep up with the rest of the system and throws random parity errors makes it even more difficult/impossible ;-)
The machine seems stable running at 16MHz @ 1WS (with an AMD 16MHz 286 CPU). Too bad I cannot get 0WS to run stable, not even at 10MHz! It is however more than 60% faster than it was at the stock 10MHz.
The chipset and memory are a lot faster at 16MHz and I already put in 4megs of homemade 80ns memory so now the time has come to bring out the big guns and put in the CPU upgrade (Ti486SXLC-40) and run some DooM and Windows 95

The AMD 16MHz part is going to live inside my PS/1 2011 which also runs fine at 16MHz (this has been done before) so after soldering on a PLCC socket on that board and modifying the RAM so it'll take 2.5 megs that machine will be ready for action as well.

 

[pipmastah]

Ok latest update on my little Model 30 project :
The Ti486SXLC2-40 upgrade doesn't work on the PS/2 Model 30-286 at all, not even at stock clock speed so I decided not to upgrade the CPU to a 486. It does run very stable at 16MHz 1WS with parity disabled though when I use my home made 80ns SIMMS so I purchased another 16MHZ AMD 286 CPU from Bulgaria and the old Model 30 runs like a dream now. Only complaint is the on board 8-bit VGA which is of course dog slow ;-) The cheap 10 to 16MHz and 1mb to 4mb upgrades are definitely worth it though. It makes those old school games like Another World or Pinball Fantasies way more playable and Windows 3.1 runs like a charm with the fast XTIDE storage