I've been working on a 8080 emulator using an ATMEGA1284 which has a surprising amount of SRAM for an AVR - 16K. So far I've been able to keep the internal memory usage to below 1K with enough stack room so that 15K of this can be exposed for emulator use (0x0000-0x3BFF). It seems like CP/M 2.2 came configured for a 20K system, so while my SRAM is well below that (15K), I do have flash available. In fact I have 3 banks of 32K flash I can map to 0x8000-0xffff easily. For drives I have two 128K i2c EEPROM which have a very convenient 128 byte page size. Can CP/M 2.2 run from ROM? Certainly some SRAM at the top of the range (under 0x3C00) would have to be used for tables and such, but if only the things that had to be put in RAM were put in RAM. I'm guessing the BDOS pointer at address 5 could be pointed to this SRAM showing programs how little memory they have and it could JMP to flash. Maybe it is a crazy idea, but I wonder if it could be done.