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Cray-1 software?? Or a CDC-9762 disk drive??

C

cfenton

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Jan 25, 2008
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I built an FPGA-based Cray-1 just for fun, but I realized that there isn't any readily available software for it. Nobody happens to work at a facility that might have some archived somewhere (or know such a person?), do they?

Alternatively, I was able to track down someone that happens to have an 80 MB disk pack used to boot, but it needs a CDC-9762 disk drive (and connected computer) to be able to read it. Anybody happen to have one of those?

Does anyone have any suggestions for where I might get such software? Someone with a working Cray-YMP or something might also be useful. I'm really after a compiler or something that I could use to 'bootstrap' it into something a bit more useful.
 
Talk to Al Kossow over at the CHM. The problem is that Cray as a company is still around and probably not too free with their archives. I suspect that an old version of COS is about all you'll be able to find, although UNICOS would be better to deal with.
 
I actually talked to Al, and he said that they don't have any software (apparently he spoke with someone at Cray, and they told him that anything that old had been destroyed before they were spun off from SGI again). Also, I implemented a Cray-1A, which doesn't have the separate I/O Processor needed by UNICOS (although I think there is enough info that I could re-create the I/O processor if a copy of UNICOS were to surface somewhere).

I even sent a FOIA request to the gov't, but they claimed they came up dry as well (at least the NNSA did . . . I still have a pending request with the DOE). Mine only hopes now are trying to find someone that works at a facility that used to have them and might have a dusty archive tucked away somewhere, or trying to recover any data that might be on the 80 MB disk pack that I mentioned.
 
the only one in sweden was used by SAAB Aero and most of it was destroyed at decommission :( The empty shell is on display at a museum in stockholm. Finding software for this beast will be hard.
 
I've made only a minimal effort at verification so far (I can execute simple programs of a few instructions and such), but the actual implementation is cycle-accurate for everything except a handful of memory instructions. I've also made almost no attempt at optimizing for speed yet, so when I synthesize the design it can only operate at about 33 MHz (the original was 80 MHz).

The design takes up about 3/4 of a Spartan-3E 1600, which is the biggest FPGA I could find that doesn't cost thousands of dollars for a dev kit.

The only missing features as far as I know are interrupts, exchange packages and I/O channels. It executes all of the actual 'compute' instructions for both scalar and vector forms, and I'm pretty sure stuff like vector-chaining even works fine. I've just been using on-die block RAM for memory so far, so it has about 4 kilowords of RAM, and then I memory mapped a UART and some LEDs. I have no software stack at all though, so the only limited testing I've been able to do has been by writing machine code directly in octal.
 
cfenton said:
The design takes up about 3/4 of a Spartan-3E 1600, which is the biggest FPGA I could find that doesn't cost thousands of dollars for a dev kit.
Click to expand...
Oh, right! I'd forgotten about the cost of the newer chips. Your design sounds very impressive.

I was a young logic designer when the first Cray came out and I remember wishing to use ECL devices in a design.

I wish you continued success in completing such a large project.
-Dave
 
Thanks! As a currently-young logic designer, this was the most I could afford (it wouldn't fit on the Spartan3-1200 I had been using for projects). Fortunately it fits with a bit of room to spare.
 
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