I mentioned in the past that, the newer versions of supposed 74 series IC's are often re-labelled other family parts, and that one way to tell, if it is a genuine TTL is to look at the output pin voltage swing (if there are no pull ups), if you look at IC 42 pin 6 recording, the amplitude of the pulse is near 5V, so that IC cannot be a genuine TTL part.
It is interesting a timing error like this because it could be that the enable signal is late with respect the clock signals. Or the clock IC52(2) early (relatively) with respect to the enable. IC52(1)
It is a matter of deciding which is probably the "normal" signal, which I think likely is the enable IC52(1), because it is essentially synchronized with the computer's phase 02 clock (they call it but the system clock on pin 24 of the bus PHI) and if the propagation times in this circuit were on the short side, it could only help time advance the enable signal and help the recovery of the first pulse. If this is the case, the pulses feeding IC 52(2) are arriving too early with respect to the enable on pin 1 of IC52.
Pin 6 IC8 specifically, that is the one where the pulses were deliberately delayed by Cromemco with 560pF capacitors on both this gate's inputs. If the IC's driving those capacitors, do not have a standard TTL output stage, the delay will likely be much shorter and time advance the pulse chain. I think that delay was put there to delay the pulses with respect to the clock signal on pin 24 of the bus, to ensure the first pulse in the chain was fully captured by the circuitry of IC's 41,43,44,42,52 .
(One thing to consider again, with the digital scope, I have seen this effect many times, the ghost pulse that "appears" to be varying in amplitude and coming and going, when it is not actually doing that, may well be a full height pulse, but narrow enough that the sampling partially misses the pulse at times. For example, if you look along the sides of the other pulses in the chain, the recording with the ghost pulse post #636, you will see that the scope is interpreting them as changing in amplitude in a similar manner, due to the time differences of the sampling. It would need a much higher sample rate to check that first pulse. But having said that, the first pulse would still be suspiciously narrow in width)
I think that the circuitry of IC43,44,42, 41 is essentially a more elaborate variant of the classic pulse synchronizer. Where you to need to output a signal which is not initially synchronized to the system clock. The outgoing pulse stream becomes synchronized to the system clock edges.