Andrew,
I am curious as to why you did not used the ZILOG ctc, pio, sio parts ? By using other parts you are seriously limiting the ability to use intelligent interrupt processes provided for in those items.
Almost all designs that I have seen no one uses these ZILOG parts. Perhaps it is due to cost.
Bill.....WB6BNQ
Hi Bill,
The Z80 peripherals are very nice. I am familiar with them from other projects. Both the KayPro 10 and the WaveMate Bullet used a fairly complete Z80 system with CTC, DART, and PIO chips. The WMB used Z80 DMA too. They work very well and I have a bunch in my junk box.
One of my earlier ideas which I rejected was a kit form of the WaveMate Bullet SBC. I have the schematics and all the parts except for a new PCB and its tiny boot ROM. However, I did not pursue that approach since the PCB was about 6" x 8" resulting in a PCB of about 48 square inches. A large PCB really drives the cost of the project up and precludes a lot of potential hobbyists from the project due to affordability.
I am trying to follow a low cost with incremental building blocks philosophy. The big "all in one" SBC designs were just too elaborate and expensive designs. I investigated the KayPro 10, WaveMate Bullet, and Heath H-89 SBCs but decided to go with the ECB approach instead.
The present core SBC design is one I am familiar with from an earlier project I built with prototype boards. It is similiar to the Thomas Scherrer Z80 SBC design but modified and expanded with various IO devices. Part of the reason I chose the design was many of the parts are common with PCs as to keep costs low and even for cheap reuse of scrap components. The rest is bog common standard TTL chips and cheap parts. Most or all can be purchased online or salvaged from old PCs and/or boards.
Also, I did not want to radically change the design since I got my previous design working fairly well it did not make sense to start over again for similar or marginal improvements. Especially with regards to the software I had already written and debugged (ie the CBIOS and monitor). It all gets down to risk and what my comfort level is with the proven design.
With this design, however, the full Z80 interrupt capability is still present for Z80 peripheral cards if and when those are ever available. You'll notice the ECB connector retains all the signals needed for Z80 peripherals including an "open drain" bus version of /INT and IEI/IEO complete with pull up resistor. All the typical IO address, data, and control lines are buffered and present for use by any future peripheral cards.
All that remains to be done is to design and build the Z80 peripherals card. Certainly the CTC, DART, PIO, and SIOs would work although the DMA probably wouldn't with the current generation (ECB support is pretty much IO only with this version, that may change if and when we get that far).
Once I get the SBC built up and tested, the next device will be the ECB backplane. I have a preliminary design for its PCB already completed but I still have the original one made from prototype boards to use for testing in the meantime.
Thanks! Have a nice day!
Andrew Lynch
PS, I ordered two PCBs on Thursday and spoke with manufacturer last night. Apparently the PCBs have already shipped so now it is just waiting for them to arrive by UPS. Yesterday I ordered the missing parts I needed from Jameco. It was just some common 1K ohm resistors and some other miscellaneous bits and pieces.
The full set of files are available here:
http://groups.google.com/group/n8vem
I will be posting pictures and other stuff as I go.
73 de N8VEM