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PDP-8/E Omnibus unexpected behavior

BitWiz

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On my front panel the lower six address lights don't work properly so I, with Vince's help, built a board that has transparent latches on MA11 -> MA0 with the Latch Enable (active high) connected to TP4 and the output of the latches connected to LEDs (the inversion is handled by connecting one side of the LED to +5V (through a current limiting resistor) and the other side connected to the latch so when the latch output (and the address line) is low the LED is on.

Everything works except the address displayed on my board is one more than that of the data displayed on the front panel with the dial set to MB.

If I press Load Address and Exam I see the data I wrote into address 0000 and my board displays address 0001.

I also tried PULSE_LA_ADDR_H with the same results.

Should I be latching on a different signal?

Does anyone have any ideas?

Thanks,

Mike PDP8AddressBusDisplay.png
 
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BitWiz

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It just occurred to me that this might be normal behavior. It's been so long I don't remember how the front panel works. But I would think when you press Load Address that address would be on the bus when exam is pressed.

After the data has been loaded then the address register is incremented.
 

kb811

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That sounds correct to me: every time you toggle EXAM it will load the data at the current address into MB and then increment the address...
 

BitWiz

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What do the front panel address lights show? Does it always show the next address not the address of the data on the MB display. The last time I used a PDP-8/E was more than 30 years ago so my brain is a bit fuzzy. I don't remember needing to subtract 1 from the address lights.

Also, press Load Address would put the current address on the lights. Gating on TP4 doesn't seem to do that.

The 1972 Small Computer Handbook says that the "Memory Address Indicates the contents of the memory address which will be accessed next"

So everything is working correctly. Now how do I get my little board to display the same thing as the front panel when I press load address?
 

intabits

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The front panel operation is described in quite some detail in:-
DEC-8E-HMM1A-D-D_PDP-8e_Maintenance_Manual_Volume_1_Processor_Sep73.pdf, starting at p3-095.
Along with the engineering drawings, I'm sure your answers are there, but it might be heavy-going before they emerge...
(I've spent quite some time looking at this, but a lot of it still hasn't sunk in)
 

tradde

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That sounds correct to me: every time you toggle EXAM it will load the data at the current address into MB and then increment the address...

That is correct so it's ready to read the next memory location.
 

BitWiz

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Does the front panel put the appropriate signals on the bus when Load Address is pressed or just when Exam or deposit is pressed?

Short of analyzing each signal with a scope as Address Load, Extended Address Load, Deposit and Exam I have not been able to figure it out from the Omnibus timing diagrams and standard documentation.
 

BitWiz

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That is correct so it's ready to read the next memory location.

But when you press Address Load the Address lights display the address on the switch register. What happens on the bus? How do I capture that address rather than the next address?
 

DougIngraham

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I am a little confused. Pressing load address transfers the switch register into the MA. I don't think pressing load address will cause the CPU to generate a TP4 so your board will not latch the bus data. Pressing examine should read memory into the MB and then increment the MA. TP4 is a good place to latch the address for the next memory cycle although the memory boards do not latch this as it is supposed to be stable.

Your board latches the data on EMA0 through EMA2 and MA0 through MA11 on TP4. The front panel circuitry does not latch the data, it shows the live omnibus. In the case of the lamp version of the front panel the lines are buffered with a DEC380A which is a quad 2 input NOR gate where one of the inputs of each gate is grounded. This makes it an inverter. Presumably, they use this part because of the way it loads the omnibus. The output of that goes into an open collector inverter, a SN7416 which has 15V capable outputs. These are the lamp drivers. In the case of the LED front panel there is a single part that buffers the bus to the LED. This buffer is a DEC 7417 which looks like a SN7417 which is an open collector buffer with high voltage (15V) outputs. In other words, the front panel for the EMA and the MA lines is what is on the omnibus. When you use TP4 to latch the address you are not looking at the same thing as the front panel.

All this is to resolve an issue with the lower 6 bits of the MA not displaying correctly on the front panel. The front panel as far as the address lines goes is extremely simple. It echos what is on the omnibus. The first question is if the issue is in the front panel, the Major Registers board, or some other card in the machine. Any board that connects to the MA lines on the omnibus are suspect. This means any data break controller or memory board could cause issues. Also the bus terminator board touches those lines. Remove anything you can for the purposes of testing. If you have a disk or dectape controller in the machine that do data break transfers remove them. If you have more than 4k of memory remove those boards as well. The boot boards work by toggling data into memory, they don't directly touch the address lines but you don't need it for this so pull it. You don't need any peripherals at this point so remove those. You may find that pulling all the boards you don't need causes your problem to go away.

What do you see when you do a load address of 0000? Do you get all zeros?
What do you see when you do a load address of 7777? Do you get all ones?
If those work then try the patterns 0001, 0002, 0004, 0010, 0020, 0040, 0100, 0200, 0400, 1000, 2000, 4000.
And finally invert those patterns and walk a zero through the MA with 7776, 7775, 7773, 7767, 7757, 7737, 7677, 7577, 7377, 6777, 5777, 3777

If all those work the problem is probably not the front panel or the circuitry in the MA register.
 

BitWiz

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Doug,

Thank you for your very detailed response.

First off I should say that my system with only the CPU board set, 4K core board set, Bus Loads, RFI Shield and Asynchronous Board (M8650) passes all MainDecs for CPU and memory. It also loads and runs focal. So I believe that my front panel problem is on the front panel board itself. I have an extender board coming and when it gets here i will dig into it in greater detail.

Secondly, my thinking is that when you press Address Load the address on the switch register is transferred to the MA register on the front panel. When the EXAM or DEPOSIT switch is pressed the address is then transferred to the bus and a read or write transaction takes place depending upon the signals on the bus. That is why I am confused that my board latches the next address rather than the address currently being read. It is possible that multiple TP4 cycles are happening, the first cycle contains the current address and the next cycle contains the current address plus 1. I'm not seeing the first cycle because the second one happens so quickly after the first that the first is not seen. I will have to look at TP4 on my oscilloscope to see if that is the case.

Here is a video demonstrating the problem that I posted in an earlier post about my front panel issues: https://drive.google.com/file/d/1DNfE_IHbbkZgAqQxZzNuadeF4qZK19Dr/view?usp=sharing

The upper 6 address bits work fine, the lower six do not. Whether you roll over from 7777 or not. Here are some additional symptoms:

All address bits off except for SR9 works correctly. MA9 will be on when the SR9 is on and Address Load is pressed and will turn off if is it low. MA9 will go off with SR9 on if SR7, SR9, SR10, SR11 are on as well and Address Load is pressed.

MA11 is on all the the time but gets dimmer the more of the lower six address switches that are on. This includes if SR11 is on. SR0 - SR5 do not affect MA11.

I believe this is solely in the lamp drivers for the MA6 through MA11 because the correct address is loaded onto the bus when I press Address Load and deposit data into memory and then look at it. The correct data is loaded at the correct address.

I appreciate any and all ideas.

Thanks,

Mike
 

Roland Huisman

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LA = load address. The switch register is now represented in the address lines. No need for a latch to see that.

EXAM performs a single machine cycle to read the memory on the selected address. Mem_start_L is triggered with a 400ns pulse to let the machine run one cycle to read that address. It shows the data which was loaded in that selected address. But the machine had to run one cycle to be able to show you the data in that address. That is why the address counts one up with examine. But that is nice if you want to read the next address too. Only need to exam, Machine reads the displayed address, gives you the answer and gets ready for the next.

The downside is when you see that the memory content is not what you wanted. Then you have to reload the address again to actually deposit new information in that location.
 
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DougIngraham

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Secondly, my thinking is that when you press Address Load the address on the switch register is transferred to the MA register on the front panel.
This can not be correct since there is no MA register on the front panel. The top row of lamps are simply what is on the omnibus on the MA pins.

Since it passes the maindecs and runs Focal, you are correct that it must be an issue with the front panel. And I give it a 90% chance of being an issue with E19 since that is the only part common to all six of those bits. Replace E19 which on my front panel is a DEC 7416 which is just an SN7416. E19 is the third IC to the left of the rotary switch or the 8th IC from the left edge of the board below the lamps. There could also be a problem with E16 but it only deals with MA8 through MA11 so far less likely.

What I think is happening with your board is that when you press load address there is no TP4 generated. It is not supposed to be generated. The only thing that happens is the switch register is gated into the MA register. This is why your board does not change on a load address.
 

BitWiz

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This can not be correct since there is no MA register on the front panel. The top row of lamps are simply what is on the omnibus on the MA pins.

Since it passes the maindecs and runs Focal, you are correct that it must be an issue with the front panel. And I give it a 90% chance of being an issue with E19 since that is the only part common to all six of those bits. Replace E19 which on my front panel is a DEC 7416 which is just an SN7416. E19 is the third IC to the left of the rotary switch or the 8th IC from the left edge of the board below the lamps. There could also be a problem with E16 but it only deals with MA8 through MA11 so far less likely.

What I think is happening with your board is that when you press load address there is no TP4 generated. It is not supposed to be generated. The only thing that happens is the switch register is gated into the MA register. This is why your board does not change on a load address.

Doug,

Thank you for your help. By MA register I meant the latches that hold the lights for the front panel.

My question is how do I capture the address used in that one cycle (for exam or deposit) rather then the address plus 1? At some during that one cycle the actual address read should be on the MA lines.

As soon as I get my extender board I will scope out E19 (Vince Slyngstad also suggested starting with that E19).

Thanks again,

Mike
 

BitWiz

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LA = load address. The switch register is now represented in the address lines. No need for a latch to see that.

EXAM performs a single machine cycle to read the memory on the selected address. Mem_start_L is triggered with a 400ns pulse to let the machine run one cycle to read that address. It shows the data which was loaded in that selected address. But the machine had to run one cycle to be able to show you the data in that address. That is why the address counts one up with examine. But that is nice if you want to read the next address too. Only need to exam, Machine reads the displayed address, gives you the answer and gets ready for the next.

The downside is when you see that the memory content is not what you wanted. Then you have to reload the address again to actually deposit new information in that location.

Roland,

Thank you for your response. My LED board latches the data on the address bus. How do I capture the current address being accessed rather than the next address to be accessed?

Thanks,

Mike
 

DougIngraham

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By MA register I meant the latches that hold the lights for the front panel.

There are no latches on the front panel for the EMA and MA bits. Just buffers to prevent the lamps from loading the bus.

My question is how do I capture the address used in that one cycle (for exam or deposit) rather then the address plus 1? At some during that one cycle the actual address read should be on the MA lines.
Latch with SOURCE (H) instead. SOURCE (H) is found on pin AL2 and is the signal that directs the core memory to turn on its read/write currents. But you could probably latch with anything except for TP4 in order to not get the next cycle's anticipated address. TP4 is the earliest point to latch the address for the next memory cycle. What all could you use?

SOURCE (H) AL2
WRITE (H) AS2
INHIBIT (H) AP2
STROBE (H) AM2
TP1 (H) CD2
TP2 (H) CE2
TP3 (H) CH2
TS1 (L) CK2
TS2 (L) CL2
TS3 (L) CM2


I am reasonably certain that once you replace E19 and the lamps are working correctly the MA display will show you the plus 1 address after the examine or deposit. This is correct operation.

Knowing the issue is with E19 you will also want to see if you can find the reason E19 failed. A 7416 is a high voltage open collector inverter. Each output can sink 40 ma according to the data book. I wonder if the wrong bulb was used or if a bulb shorted or something like that. There is no overcurrent protection so a bulb with an operating resistance of less than 200 ohms would burn it out eventually. The bulb resistance will be a lot less than 200 ohms when measured with an ohm meter. My replacement 7371 bulbs have about a 35 ohm resistance when cold. At 8 volts this bulb pulls 33 ma making its operating resistance around 240 ohms. Note that 33 ma is nearing the limit of the 7416 device. If you calculate the startup current when the bulb is cold you find that each bulb will pull around 240 ma which is well in excess of the per gate limit. However DEC has arranged that the bulbs will have some current flowing even when the gate is turned off. This pre-warms the filament and increases its resistance so the starting current is nothing close to 240 ma. Another side effect of doing this is that the bulbs last longer as the filaments are not subjected to as severe of thermal cycling. DEC used a 390 ohm resistor to provide a minimum filament current of a little less than 20 ma at startup and more than 12 ma when up to temp. I did those calculations because I was curious about the operating currents. Anyway, look for some reason the 7416 blew up so your replacement doesn't suffer the same fate. If you don't find a reason, it was probably fixed already.
 

vrs42

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TP4 is the earliest point to latch the address for the next memory cycle.

That's why I suggested it. But it doesn't reflect memory cycles that the front panel hasn't started yet, which has been pointed out.

Knowing the issue is with E19 you will also want to see if you can find the reason E19 failed. A 7416 is a high voltage open collector inverter. Each output can sink 40 ma according to the data book. I wonder if the wrong bulb was used or if a bulb shorted or something like that.

My theory is that there's something wrong with the ground run for E19. Perhaps a bad solder joint or a cracked/cut trace?

Vince
 

BitWiz

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Doug,

Thank you for all of your help.

I will try gating off of SOURCE_H rather than TP4_H.

I will replace E19 and see how is goes.

I replaced all of the lamps on my front panel with AML-7367 from Advanced Micro Lites in Illinois ( https://www.advmicrolites.com/incandescent/ ).
Please see my post here ( https://www.vcfed.org/forum/forum/genres/dec/1225001-pdp-8-e-front-panel-lamps?p=1226198#post1226198 ) for a comparison between this bulb and the bulbs that were already in my PDP-8/E. I have spares if you need some.

Thanks again,

Mike
 

BitWiz

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That's why I suggested it. But it doesn't reflect memory cycles that the front panel hasn't started yet, which has been pointed out.



My theory is that there's something wrong with the ground run for E19. Perhaps a bad solder joint or a cracked/cut trace?

Vince

I will check out the ground run for E19. Thanks for everything.
 

DougIngraham

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That's why I suggested it. But it doesn't reflect memory cycles that the front panel hasn't started yet, which has been pointed out.
I figured as much and TP4 is the obvious place to latch the address if you are a memory board. Clearly not quite what he was looking for here. Looking forward to hearing if SOURCE does what he wanted. It still wont latch on the Load Addr switch press which probably means it still won't be exactly what is wanted.
 
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