• Please review our updated Terms and Rules here

PicoMEM Project : Pi Pico on an ISA Board.

I would love to test it in my Olivetti Prodest PC-1 (Nec V40, 512 kB RAM) but I doubt that it would fit in the ISA slot at the right side of this keyboard-PC. The ISA slots are a bit deeper in the housing so an ISA card would require to have a bit longer contacts as usual ISA cards.

Here you can see the ISA slot of that neat PC. Olivetti offered an expansion box fitting here in good old times, having 128 kB extra mem, XTA harddisk and one ISA slot.

Question: Can I disable the floppy emulation function of your card, or can it be moved tó alternative FDC adress. On alternative adess it still could be used to load disk images and copy them to real diskettes using some special copy programs which support secondary floppy controler...
Hi,

I know the Olivetti PC1, I have one (But never tested it yet)

Generally, an ISA Rizer is added to the PC1.

Everything can be enabled and disabled. I also plan to integrate a Floppy copy/Creation menu dirrectly in the BIOS (Simple to do, but my test PC Floppy is not working)
 
Hello @FreddyV

I do have a Schneider Euro PC II, so I would like to express my interest in becoming a tester for this awesome PicoMEM board.

I have all original hardware, the only mod is replacing the leaking battery with CR2032 and the only known issue is that it just won't keep the time (I need to replace the crystal I guess at some point).

I am using an 8-bit EGA card in the one and only ISA slot and I don't have an ISA riser/expader or anything like that.
 
Hi,

Yesterday, I tested the PicoMEM on an IBM 5150, and it fail.

I used a logic analyzer and I found that the RAM Refresh DMA Cycles can cut the ISA Cycles in 2 (ALE, then, the IOR/W MEMR/W)
Support this will require quite some work.

As this is something that never happens on an Amstrad PC, by Board work correctly on the PC200 and Amstrad PC1512.
I really need to test it on more PC.
 
Hi,

Yesterday, I tested the PicoMEM on an IBM 5150, and it fail.

I used a logic analyzer and I found that the RAM Refresh DMA Cycles can cut the ISA Cycles in 2 (ALE, then, the IOR/W MEMR/W)
Support this will require quite some work.

As this is something that never happens on an Amstrad PC, by Board work correctly on the PC200 and Amstrad PC1512.
I really need to test it on more PC.
Yes, on Prodest PC 1, but here you need modified PCB that it can fit deeper in it's ISA slot, like drawn above.

also in that category are the venerable Olivetti M24, Amstrad PC1640 and Amstrad PC2086
 
I used a logic analyzer and I found that the RAM Refresh DMA Cycles can cut the ISA Cycles in 2 (ALE, then, the IOR/W MEMR/W)
Support this will require quite some work.

FWIW, strictly speaking if you can recognize these refresh cycles you don't need to respond to them, the data read goes nowhere. On the flip side, though, I think you might hypothetically run into problems with some DMA-using devices if you can't handle this timing; I think it's *possible* for an aggressive enough DMA client to do a memory operation in the same size time window as a refresh cycle. (IE, fewer than 4 T-states.)
 
FWIW, strictly speaking if you can recognize these refresh cycles you don't need to respond to them, the data read goes nowhere. On the flip side, though, I think you might hypothetically run into problems with some DMA-using devices if you can't handle this timing; I think it's *possible* for an aggressive enough DMA client to do a memory operation in the same size time window as a refresh cycle. (IE, fewer than 4 T-states.)
Hi,
The Way PicoMEM work is to latch the @ with the ALE Signal, then wait for a fixed time to sample the Data and control signals.
If a DMA Cycle come in the middle, there may be other issue:
- During the @ sampling time, if the refresh start, the Address may be wrong.
- Need to pause my wait loop to read/ write the Data Later

React on the IOR, IOW,MEMR, MEMW require 4 PIO State machine... not possible , or do an AND to all these signals, then modify the board.

DMA cycles for devices does not affect really the board, as these DMA will be done on @ not manage by the PicoMEM (The PicoMEM does not support Memory DMA cycles, this is a limitation of the board)
 
DMA cycles for devices does not affect really the board, as these DMA will be done on @ not manage by the PicoMEM (The PicoMEM does not support Memory DMA cycles, this is a limitation of the board)

I would think this would be a problem for conventional memory backfill (or, in certain circumstances, UMBs) in standard PCs, given that floppy controllers use DMA.

(* For instance, someone that modified some code I wrote to point-enable the RAM on a Lo-Tech EMS compatible memory board into a UMB without needing the driver installed to do the same for a RAM chip plugged into the ROM socket of an Ethernet card discovered their machine would crash if they loaded the DOS data structures into the resulting UMB. Root cause was that the decoding on the RTL chipset qualifies the ROM decode on ALE, which isn’t “correct” for RAM in the PC architecture, and therefore, yeah, broken DMA to DOS’ floppy buffer.)
 
Last edited:
I would think this would be a problem for conventional memory backfill (or, in certain circumstances, UMBs) in standard PCs, given that floppy controllers use DMA.

(* For instance, someone that modified some code I wrote to point-enable the RAM on a Lo-Tech EMS compatible memory board into a UMB without needing the driver installed to do the same for a RAM chip plugged into the ROM socket of an Ethernet card discovered their machine would crash if they loaded the DOS data structures into the resulting UMB. Root cause was that the decoding on the RTL chipset qualifies the ROM decode on ALE, which isn’t “correct” for RAM in the PC architecture, and therefore, yeah, broken DMA to DOS’ floppy buffer.)
As my board is doing Floppy emulation :)
And RAM emulation can be disabled in the BIOS setup, so go back to the original with working floppy is simple.
Add DMA support is lot of work and may be impossible without board hardware modification, it is not worth the effort with what it bring.
 
As my board is doing Floppy emulation :)

The point is you never know how someone will want to mix and match hardware. Not everyone will want to disable their real floppy controller. I mean, I guess it’s a fine answer that in that case you have to use real wired RAM. Presumably that would also be the case for anyone wanting to use an original MFM controller or Soundblaster card as well.
 
The point is you never know how someone will want to mix and match hardware. Not everyone will want to disable their real floppy controller. I mean, I guess it’s a fine answer that in that case you have to use real wired RAM. Presumably that would also be the case for anyone wanting to use an original MFM controller or Soundblaster card as well.
The main advantage of the PicoMEM RAM emulation is it can then have its BIOS and use emulated RAM as a dual Port RAM for fast "Disk" Access.
Then, we can think about the RAM and EMS emulation as a Bonus, it allow to run software needing more RAM, as long as it does not use a Floppy.
Sound Card will work for most of the application, as the DMA Buffer is in lower portion of the memory.
For example, Mod Master work with no problem on Sound Blaster, and I could play big .S3M files using the emulated RAM and EMS for samples.
We can also have the picoMEM there, disable everything to go back to the original conf (Only some ROM space is used)
I use my Vintage PC since years, and almost never used the floppy...
 
If I manage to do a 286 or plus version, the RAM emulation will be useless as RAM for the CPU, but still needed for BIOS and communication with the board.
 
I use my Vintage PC since years, and almost never used the floppy...

I use floppies with my PCs all the time. (I archive software that hasn't yet been preserved.) Can PicoMEM emulate a second floppy controller, instead of forcing the primary controller offline?

I'm late to the party and not aware of current issues, but you might want to consult James Pearce's XT-CFv3 design, which uses DMA. I have one of the prototypes, and it still works well; extremely high speeds, and (after some firmware tweaking by James) doesn't interfere with the Sound Blaster. I used it to execute disk access and sound blaster 2.0 auto-init DMA at the same time.
 
I use floppies with my PCs all the time. (I archive software that hasn't yet been preserved.) Can PicoMEM emulate a second floppy controller, instead of forcing the primary controller offline?

I'm late to the party and not aware of current issues, but you might want to consult James Pearce's XT-CFv3 design, which uses DMA. I have one of the prototypes, and it still works well; extremely high speeds, and (after some firmware tweaking by James) doesn't interfere with the Sound Blaster. I used it to execute disk access and sound blaster 2.0 auto-init DMA at the same time.
Hi Jim,

I know you are not a stardard User :) and you don't need the PicoMEM to work.
Anyway, you will find lot of possibilities with this board around the developpment, debug that also standard users will not care about :)

DMA will not work on the memory emulated by the PicoMEM, if your PC had 640Kb of RAM, it will fail only if an application try to use UMB for the floppy access.

On the PicoMEM, you can enable/Disable what you want, the Floppy are not emulated in Hardware, it is only an Int13h redirection :)
So, you can map a disk image to B: Only if you want, and disable memory emulation as well.
The PicoMEM will have so many possibility of emulation that it can be usefull, even as a simple USB Mouse card.

I don't know if you saw my message in Twitted, I need to review the BUS interface code to have it working on 5150 as the DMA can cut the ISA cycles in 2 on it.
I have to enter the phase of test with multiple PC, as I developped it on an Amstrad PC so far.
 
Last edited:
Back
Top