For those who didn't burn their fingers in the late 80s with the new CMOS PALs here is my first hand experience.
All bipolar devices such as 74LS, 16L8 and similar, when they said that the maximum propagation delay was, say, 15ns then that was true. BUT it was also true that the MINIMUM propagation delay was also never less than about 12ns, and was marked on the data sheet. This is simply not true of CMOS devices other than 4000. A CMOS PAL would have the same maximum propagation delay of 15ns, but the data sheets never mentioned a minimum. Why, because it could be 1ns. The safest way to regard the propagation delays of CMOS devices is as the maximum SKEW between any two outputs. This is more a case for PALs than logic. I have sat at a scope looking at outputs from PALs that did exhibit this amount of skew, something that bipolar devices NEVER showed.
I also think that they used to make CMOS logic, test it, and the failed devices were labelled as the slower family. I was using 74HC244s as DRAM address multiplexers, one manufacturer was showing 12ns or so, the other was 2ns. That was FC speed, not HC speed.
So, if you are repairing old computers with bipolar logic, don't use CMOS unless you can fault find to chip level. Don't forget that an edge speed of 2ns is a bandwidth of 170MHz.