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Restoring a Dec MiniMinc / PDT11-150

C

czunit

Veteran Member
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Aug 7, 2015
Messages
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I figured it would be worthwhile to start a thread on my fixing of an old MiniMinc. This system was a pdt11/150 that DEC sold with a basic on floppies to do some scientific analysis. Functionally it's a good old pdt11/150 with a different badge.

Problem is it's been sitting for 20+ years and is what we would call "sad". On the positive side it is here, and I do have a fully operational pdt11/150 to compare it against. So I'll be doing a step by step restoration of the thing using the working pdt11 as a reference.

Which is good because there is a LOT of weird stuff on the PDT's, and they don't quite respond like you think they might. So hopefully we can start to define a base system, then get this poor little thing working again.
 
First step is to define a working pdt11 and what you need to do with it to get *anything*. Because when I hook up the MiniMINC CPU, memory, and serial board to the power supply (all voltages good) and hook up a PC by serial nothing happens. So in order for a GOOD 11/150 to work you need the following:


Serial port: You should use a USB to 9 pin serial adapter of your choice, and a simple 9 female to 25 pin male adapter to plug into the console port. Null modem is NOT needed.
Commands: You need to hit ENTER twice in order for the system to do anything. It should then sit, rattle the floppy heads, and display a message asking for 0 or 1 as the boot device.

The system will not work if:
The 14 pin ribbon DIP connector between the CPU and floppy board is disconnected. Odd, but you must have this connected and the floppy board must be something in order for anything to work. Weird, but true.

You can pull one of the ROMs off the serial board and have the system drop into ODT instead of boot code, however you STILL have to hit enter twice. No clue why. Also if the floppy interface is not plugged into the CPU board it will never even go to ODT. Weirder but true.

Next step: Find that cable and connect the floppy board to the CPU board.
 
Thanks for starting this thread. I have a PDT11/150 that arrived as a surprise when retrieving some other equipment. No media came with it. Other than a general opening, inspection, and dust-out I've not tried to test/restore it. My recollection is that it was internally in good condition and both the FDD looked to be OK. Right now isn't a good time to investigate further, but I'll certainly be following your findings and taking notes for a future activity here. So keep 'em coming :-}.
 
Sure, they are weird little things. One item I have found is that the memory and serial "daughter cards" are connected to the CPU board by contacts in the risers that touch pads on the cards and the main CPU board. These are held in place by the screws and plates that hold them together and yes they can oxidize or lose contact if the boards are lifted after 40+ years. It's complicated.

If I can remove one of the ROM chips and work on bringing it to ODT I can use simple peeks and pokes to check out the status of the memory. Then I'll start working on the floppies....
 
Interesting. One thing I noticed in the service manual is that disabling the autobaud detection seems to be done by flipping sw1 which also asserts DTR. So maybe turning that feature off (autobaud) might allow a 3 wire RS232 cable to work.

Meantime I hooked up the floppy controller with the 14 pin cable and still nothing. Drat. So I put it in test mode and watched the LEDs on the CPU board. 17 is the code where it stopped, which is waiting for the floppy controller to assert an interrupt. Specifically:

Verifies that an interrupt request from the
Disk Controller module occurs at the
completion of phase I of the disk drive
diagnostic. The disk drive(s) should not
be active (head searching). If active,
refer to Table 5-3 for fault indications
of Disk Controller module or disk drive.

Ok, so something is wrong with the disk controller module. Since the reference pdt11 would not go into ODT with the disk cable disconnected from the CPU board I'm guessing that the system goes through these diagnostics before it even allows the pdp11 processor to run. Might be run by the 8085 chip on the board...
 
Going back and looking at the disk module I can see that all LEDs come on, then LED2 is stuck on. Which means a problem in the LSB of the memory on the disk board. Ok, this at least means that the CPU and ROM on the disk module *are* working, which is nice so time to figure this out.

6jMXeBF.jpg


There are a lot of hand-wired ECOs and I wonder if that double stacked chip is the memory. Time to break out the magnifiers and see what's going on....
 
Ok, looking through the manual again I can see that the memory is the pair of 2101 chips over at E42 and E46. Not sure which one is the low one but I can probably replace both of them pretty easily. Have some other things to do so I will be putting this aside for a week or two but will get back to it later in July.

Never dull...
 
Well after a week parts came in. The 22 pin DIP sockets are narrow, not wide so I will have to solder on the RAM chips.

First step was deciding which chip to swap first. Manuals don't differentiate between the low and high bit rams, and the test showed an error in the high side RAM so I took an IR picture and noticed the Intel chip over on the end was warmer than the one next to it. Off came the Intel chip, put a new chip in, same problem.

Swapped out the second RAM chip. This seems to have changed things. Now the system in test mode does not light up any lights on the floppy board until the disks do a braaap seek. Progress. Now led3 and 1 are lit. This looks like step 5 in Phase 2 of the test code where the disk writes to blocks on a scratch disk. Given that I don't have a disk in there the failure is kind of expected.

Note: High side ram chip is the one on the inside of the board. Low side is the one on the edge corner of the board.

However, the system does not come up when in run mode. Going to test mode with autobaud enabled and factory test mode off got me:

SCRATCH FLOPPY INSTALLED? N

EIA LOOP BACK TEST? N

I may need to hook up the second disk drive in order to get the normal mode going. Will work on it more tomorrow but it looks like the disk controller at least is working better....

Progress!

So.... The disk controller board seems to now pass the basic diagnostics, which is good,
 
Sure. We learn by doing.

Been thinking about the CPU not coming up when in normal mode this morning: I wonder if the tests are done by the 8085 CPUs on the CPU and floppy controller board and NOT the LSI11 CPU. The console 8085 does the brokering for the main serial port, so it could be the thing that is talking to the serial console and putting up the messages without the main processor running.

Need to find the extension board that allows the second floppy's cables to reach the top board. Otherwise I might try pulling one of the LSI11 boot ROMs on the memory board to see if I can force the processor into ODT. If it doesn't go into ODT then I have an issue.
 
"Interesting. One thing I noticed in the service manual is that disabling the autobaud detection seems to be done by flipping sw1 which also asserts DTR. So maybe turning that feature off (autobaud) might allow a 3 wire RS232 cable to work."

My experience has been that you need DTR active for the console port to work, autobaud enabled or no.
 
Ok, it's hot as hell here, so I can only work in the shed in the mornings. Need to put AC in there....

Regardless, I got some time on the system. It still does nothing in "run" mode, and I know the switch between test/run/reboot is working (worked in the other PDT11) so something is still wrong. When I power up in run mode, the system does nothing but two of the front lights come on then one goes off. Pressing @@ will cause the light to go out and the disk drives to do a quick brap. Then nothing on the display.

We know the UARTs and display board are good because in test the system comes up with the SCRATCH DISK thing. I tried pulling one of the ROMs on the memory board to force the 11 into ODT mode but still get nothing. I know the cable+USB adapter works because it worked on the other pdt11.

So I figured maybe the memory riser was bad or dirty. Pulled the memory board, cleaned the pins, cleaned the board, put it back together, still nothing. Note: With the memory board off, putting the system in TEST mode still runs the tests, so I can say with certainity that when you're talking to the test subsystem you are not talking to the pdp11 CPU in there. You're just talking to the 8085 processors.

So what's next? It's possible one of the pdp11 chips are bad, there are four on this board as opposed to five on a normal 11/03 board, but one has two chips on it so that is probably EIS/FIS+the 4th ROM. I should be able to pull them one at a time and replace them with the same 11/03 chips to see if anything works.

I think what I'll do is set up a simple 11/03 in a BA11, get it to ODT, then start swapping the CPU chips one at a time to see what happens. Anyone know if the chips have to be in a certain order?
 
Hm. Working on this is interesting. The 4 chips of a 11/03 CPU do have to be in a specific order, and the order on the pdt vs. the LSI11/2 board is different.

PDT11Chip functionPDP11/03Chip function
1631BAppears to be EIS/FIS microcode
3015ROM, possibly EIS/FIS2007CControl chip, CPU
3010d/3007 on single carrierROMs, pdp11 microcode3010DHalf of the pdp11 microcode
2007CControl chip, CPU3007DOther half of the pdp11 microcode
1611hRegisters, CPU1611hRegisters, CPU

From what I can see in the schematics position matters, and it's possible that the ROMs need to be in specific sockets as well. This is a problem as you can't test the PDT11 ROM in the 11/03 board since both chips are on one socket. Likewise you can't put the 11/03 ROMs into the PDT11 because they will be at the wrong micro-addresses.

So if the ROM is out, we're screwed.

Hm.
 
Well that's ... annoying. Had no idea that DEC had ever packed the LSI11 microcode that way. Must have been a late-in-the-lifecycle thing forced by lack of PCB real estate in the PDT? I believe that normally the LSI11 chip-set is ordered as:

Data (21-11549)
Control (23-002C4)
Microm 1 (23-001B5)
Microm 2 (23-002B5)
EIS/FIS (23-003B5)

I've seen the positions of the Data and EIS/FIS ICs swapped (what I believe that you are documenting in the right-half of your table) but the other three seem to always be in the same positions. I'm curious whether you can swap the end-position ICs on the PDT as well.
 
Not sure. The dual width 11/03 has a different chip layout from the older quad width and looking at the schematics I think that slot position matters even for the ROMs as you would need to have the CPU chips address the right ROM when they needed to do something. My guess is they doubled up the chip select lines and route them to either of the two mini-ROMs on the same carrier, so you can't really swap that chip into an 11/03.

Why? I'm guessing they were building the PDT11 as a simple 11/03 CPU core, then someone in development said "Hey, we could sell it as a scientific MINIMINC!" then realized that would need some sort of floating point support. Since the board had been laid out for 4 chips they needed to double up two ROMs to make a fifth.

Now for a really interesting question: How did the WCS11 work? It was able to add 1k words of control storage to a pdp11/03 which would mean that the last slot (for EIS/FIS) would have to support 1k worth of addressing in the high bits even though the EIS chip is only 512 words. Or is the EIS/FIS chip 1k words in size....
 
The WCS (M8018) was XOR with the EIS/FIS. It's a separate board with an over-the-top cable that plugs into the usual EIS/FIS position. It also required a quad-height LSI11 without the on-board 4K RAM (M7264-YC = KD11-N); don't recall why that was the case. But whatever addressing was required for the WCS11 was "native" to the M7264-YC -- AFAIK you can't use the M8018 WCS with any other 11/03 module.
 
Back to the system. I took it upstairs and hooked it up to my working PDT11 in place of its' CPU board. Still no dice, same response.

Time to get out the troubleshooting tools. In this case we'll start with the IR camera.

Took a picture of the pdp11 side of the board and noticed something right off the bat: Two chips were showing as "hot", one to the touch. They are the
mm8026
CP1
7926
8 pin DIP chip.

Intel d3245
s6321
14 pin DIP chip

The first chip seems to be a motorola chip that was used as a "clock driver". Basically looks like two inverters. The second chip is an Intel Quad TTL MOS Driver 4-Bit Clock Driver Chip. I haven't found the datasheet on it, but if the system is not generating clock signals for the pdp11 CPU chips then yes I could see things being "down".

I think I'll start with the Intel chip and order one of each. If anyone can find the datasheet let me know and I'll see if I can do signal analysis on it. It's right next to the crystal, so that might be it.

Never dull.
 
pbirkel@gmail.com said:
The WCS (M8018) was XOR with the EIS/FIS. It's a separate board with an over-the-top cable that plugs into the usual EIS/FIS position. It also required a quad-height LSI11 without the on-board 4K RAM (M7264-YC = KD11-N); don't recall why that was the case. But whatever addressing was required for the WCS11 was "native" to the M7264-YC -- AFAIK you can't use the M8018 WCS with any other 11/03 module.
Click to expand...
I wonder: The WCS allowed you to control a number of lines out of the 11 CPU, I wonder if one of the lines was the old chip refresh circuit. That would be something that would not be on the YC module. One of these days I'll dig it out and fix the 1k RAM chip on it that is broken.....

It does use the "top 2" Microm address spaces, so it can't be used with EIS/FIS. Interesting enough, my pdt11/150 (the real one, not the pdt11/150 that's a MiniMinc) has 4 chips and they look to be the "normal" ones without EIS. It's possible the double chip was only used on EIS/FIS equipped pdt11's (ie: MiniMincs)

3007D
3010D
2007C
1611H

So I'll bet if I fire up RT11 and check this system it won't report EIS/FIS.
 
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