Were there ever 386 motherboards with fake cache?

[jh1523]

I recently acquired a motherboard, model "M326 v5.5" similar to http://artofhacking.com/th99/m/U-Z/32353.htm; I'm wondering if it has fake cache, as all of the signs are there: soldered cache chips instead of socketed (4+tag) and chipset that has sticky labels on top (SARC RC4018A4) instead of laser engraved; BIOS chip also soldered in. Unfortunately I can't test it (yet) as it seems the CPU clock is locked at 40MHz (j4 doesn't exist, replaced with a resistor; it didn't come with a CPU, but has a NPU installed, IIT 4C87DLC-40) and I don't have a 40MHz 386. There is one on the way to me, but it comes all the way from Poland so it'll be a while.

It's a fairly late production 386, a warranty sticker on the last ISA slot places it in the first half of 1995. So it was more or less contemporary with all those 486 fake cache motherboards. I wonder if anyone here is aware of 386s with fake cache. It seems that the same technique could be applied, by the same manufacturer and for the same reason.

(edit) found a pic on the net, my board is almost identical to the one on the left except it has a NPU installed and no CPU, and J4 (which you can see in the picture) is absent and a resistor occupies that space.

 

[Caluser2000]

I've got a 386dx40 mobo were the L2 cache is non functioning. The previous owner tried replacing the chips with no joy. Looks funny with the cache ram chips sitting about 1cm above the surface of the mobo.

 

[vwestlife]

All of the fake cache chips I've seen have "WRITE BACK" printed or engraved on them -- a sure sign of fake cache, because the ability to access the L2 cache in write-back mode is a function of the motherboard's chipset, not of the cache chips themselves.

 

[orion24]

Now that you mention, I bought my 386DX-40 board in mid-93 (normal performance). A friend of mine bought a 386DX-40 in mid-95 and it was notably slow. Benchmarks showed it perform quite slower than a 386DX-33 (don't remember how slow exactly). I was not experienced enough at the time, but I was blaming the software he was loading in config.sys / autoexec.bat (incluging Norton AV auto-protect and such kind of things), but now I'd really like to have a look at that board.

BTW, the board on the left is quite different than the one on the right. The just look similar.

 

[jh1523]

BTW, the board on the left is quite different than the one on the right. The just look similar.

Yes they are. They're not mine but a pic I found on google image that shows a board that's very close to mine (the left one)

All of the fake cache chips I've seen have "WRITE BACK" printed or engraved on them -- a sure sign of fake cache, because the ability to access the L2 cache in write-back mode is a function of the motherboard's chipset, not of the cache chips themselves.

I've seen many pictures of fake cache chips where they looked perfectly normal, even having engraved real part numbers, yet they were fake.

 

[jh1523]

Well it looks like this motherboard does have fake cache... or at least part of it is fake...

I finally got the CPU (an AMD AM386DX-40), fired it up... the BIOS reports that it has 128k cache enabled.

However, cachechk sees only 32k L1 cache, and no L2 cache. Same with ctcm (report included below)

CTCM, translated by Thomas Pabst, copyright ct-Mag. V1.5b/t2
Processor-Timing   : i386DX,i386SX
Processor CPUID    : unknown  
Clck               : 40.0 MHz
internal Bus       : 32 Bit between CPU and primary Cache or Memory          
FPU                : 80387-Typ
L1 Cache           : 32 KByte, direct mapped
L2 Cache           : not found or not active or more than 8 times associative 
Write Strategy  L1 : Write Back

         Through Put & Bus Performance: Main Memory from  00120000

Best Time for  16K MOVSD (Cache /Page Hits) :   417 mcs -  39.3 MByte/s
average t. for 16K MOVSD (Miss + Hit)       :  2121 mcs -   7.7 MByte/s
average t. for 16K MOVSD (if  clean)        :  2121 mcs -   7.7 MByte/s
average t. for 16K MOVSD (if  dirty)        :  2122 mcs -   7.7 MByte/s
Main Memory    16K MOVSD (Cache misses)     :  2121 mcs -   7.7 MByte/s

average under   DOS     (640K):  1930 mcs -   8.5 MByte/s
average under   Windows (4MB) :  1930 mcs -   8.5 MByte/s

The chips on the motherboard are as follows: 4x UM61256k-20 and 1x AS7c164-12pc. The first ones are supposedly 32kx8, and the last one (tag) 8kx8. But both programs I used report 32k L1, so what does that mean? One of the 32k chips is real and the others aren't? They all look exactly the same. The CPU definitely doesn't have any built-in cache... I'm a bit perplexed.

 

[Uniballer]

Your cache tag RAM is only 8Kx8. So you have a cache with 8192 lines. Your data cache RAM is 32 bits (4 bytes) wide, as is the data bus of the CPU. You would need to double both the tag and data width to implement a two-way set associative cache, with additional logic to compare tags on both sets at once. So you have 8K direct-mapped lines. The physical data bus is 32 bits, or 4 bytes wide = 4 * 8K = 32K bytes of data cache. The fact that your data cache RAMs are 32Kx8 is wasted because you don't have enough cache lines to use the additional 3/4 of the data cache RAMs. A deeper tag RAM could maybe have been used to increase the number of cache lines to 32K, but I don't know if the logic to implement the deeper cache exists in the chipset (it implies shifting some address lines around in the cache logic when the cache is deeper). It's easy to try if you have the right RAM, though. It shouldn't hurt anything, but may give the same result.

Edit: it would also be possible to select different bytes from a wider cache line implemented by providing two additional address lines to the cache data RAM than are used for the cache tag RAM. This would allow for 128K of cache using the RAM you have. Cache management becomes a little harder, though, because you either need "valid" bits for each of the (4) 4-byte entries in a cache line, or you need to fill all 4 32-bit entries when the cache line is filled. Maybe there is a jumper on the board to do this (I have a 386DX40 board with ALI M1429 chipset with jumpers for this).

 

[Anonymous Coward]

Maybe what's happened is that you have 32kx8 chips installed, but the cache jumpers are configured for 8kx8 chips. Double check the jumper settings if possible.

 

[jh1523]

There are no jumpers for the cache (not surprising since the chips are soldered). In fact the motherboard has very few jumpers at all. There is one to enable/disable the coprocessor, one to enable/disable turbo, and that's all.

So if I were to replace the 8kx8 chip eith a 32kx8 there may suddenly be an additional 96k of cache suddenly "unmasked"? That would be a bit of tricky desoldering/soldering. I do have 32kx8 sram chips though, hmm...

 

[orion24]

I wouldn't rely on software to detect the cache. I'd be more convinced with some benchmarks. It's weird it even mentions L1 cache, as there is no such thing in this system. Try the NSSI software: http://www.navsoft.cz/products.htm . Appart from detecting, it also has benchmarks. Any cache problem with the 386 and it should benchmark a lot slower than a typical 386DX/40 in CPU performance. But if it does perform like a DX40 should, then everything is OK with the cache, regardless what the software detects of it.

 

[Uniballer]

There are no jumpers for the cache (not surprising since the chips are soldered). In fact the motherboard has very few jumpers at all. There is one to enable/disable the coprocessor, one to enable/disable turbo, and that's all.

There might be options that don't have headers and plastic jumpers. Of course, even if they exist it's possible that they don't work right. Look for pads with soldered wire jumpers.

Maybe even look up the chipset parts to see if you can find design guides or application notes that would tell you what the chips could do.

So if I were to replace the 8kx8 chip eith a 32kx8 there may suddenly be an additional 96k of cache suddenly "unmasked"? That would be a bit of tricky desoldering/soldering. I do have 32kx8 sram chips though, hmm...

Maybe. This kind of thing definitely worked with some 486 boards, so I don't see why it couldn't have been done with late 386 boards, too. But there are no guarantees.

If you are really going to remove the tag RAM the safest way for the motherboard is to clip all the tag RAM pins as close to the body of the chip as possible, then remove the pins one at a time. Remove the solder from the holes with wick or a solda-a-pullt style tool. Then solder in a machined-pin socket. This sacrifices the chip in the interest of avoiding damage to the motherboard.

 

[jh1523]

Well the problem with looking up the chipset parts is that the part numbers are printed on stickers that are slapped on top of the chips, and underneath there's no marking... so... chipset is basically unknown.

Yeah, if I'm going to replace the tag I'll put in a socket. I don't really care about preserving the original chip, I have lots of replacements.

As for software tests/benchmarks, I tried speedsys and it didn't even try to benchmark the memory for some reason.

(edit) If I'm going to replace the tag ram I may as well try to solder in a socket for the BIOS chip, and perhaps try other BIOS versions.

 

[smeezekitty]

Well the problem with looking up the chipset parts is that the part numbers are printed on stickers that are slapped on top of the chips, and underneath there's no marking... so... chipset is basically unknown.

Yeah, if I'm going to replace the tag I'll put in a socket. I don't really care about preserving the original chip, I have lots of replacements.

As for software tests/benchmarks, I tried speedsys and it didn't even try to benchmark the memory for some reason.

(edit) If I'm going to replace the tag ram I may as well try to solder in a socket for the BIOS chip, and perhaps try other BIOS versions.

Make sure you boot DOS without any memory managers or speedsys won't bench it. I use F5 when booting

 

[Uniballer]

If I'm going to replace the tag ram I may as well try to solder in a socket for the BIOS chip, and perhaps try other BIOS versions.

Obviously, it is a lot harder to get a large chip like the 386 BIOS chips off the board without damage to either the board or chip.

Perhaps the BIOS tag info will give you a hint about the chipset. I feel that there is more chance of some benefit from messing with this board if you could identify the chipset, or at least some permanently strapped option jumpers. The 386DX-40 board I have that allows selection of 32KB or 128KB cache always uses an 8Kx8 tag, and either 8Kx8 or 32Kx8 data RAMs. There are four jumpers that must be changed to change the cache size.

 

[jh1523]

I don't see anything on the board that looks like phantom jumpers. It looks like it has been streamlined for compactness with anything "useless" removed. Even a jumper available on previous revisions on the board that allowed for CPU speed select 33/40MHz has been removed and in its place there are a few passive components, no pads or anything. Because of that the board can only run 386DX-40 CPUs and nothing else.


Assuming that the chipset is what the sticky label on it says (SARC RC4018A4), what utilities are there to analyze it? I have tried googling and came out empty.

Make sure you boot DOS without any memory managers or speedsys won't bench it. I use F5 when booting

Yes that was in pure DOS with no memory manager at all.

 

[Anonymous Coward]

The memory utility you are using probably wasn't meant to be run on a 386, which is why it mis-identifies your cache as L1.

As for swapping out the chips, it's not going to work without changing a jumper. If the cache is working I'd leave it alone.

Look at the TH99 link you showed us. Don't you find it interesting that 32kb is the only available cache configuration listed? My bet is that unsoldered J2 and J3 are the ones you need to change the cache size. Looks like you'll have to solder them in. Should be easy.

Have a look at this board:
http://www.amoretro.de/wp-content/uploads/pc-chips_m326_g.w386_486_main_board_cache_motherboard.jpg

notice J2 and J3 are permanently soldered closed? Aren't yours both open?

 

[jh1523]

Well, here's the deal. I looked again, and indeed I found pads for J3 and J2 (they were hidden under a resistor network that was folded on top of them) and they were indeed open. So I soldered jumper headers on both so I can enable/disable each individually. Here are my test results:

J3=off, J2=off (default config) see test results posted earlier.

J3=on, J2=off: motherboard does not POST

J3=off, J2=on: motherboard does POST but does not recognize floppy drive. I tried moving the VGA and I/O card to different ISA slots a few times, as this is a trick that works sometimes - didn't work here.

J3=0n, J2=on: motherboard does POST but does not report any cache (with both jumpers off it reports "128k cache enabled"); if I go into CMOS and disable external cache - same result; reenable external cache, boot to DOS, run cache test programs, neither finds any cache. However, the RAM seems faster now for some reason, at least as far as cachechk is concerned.


Here are the results from running cachechk.exe with both jumpers on:

CACHECHK V7 11/23/98  Copyright (c) 1995-98 by Ray Van Tassle. (-h for help)
 CMOS reports: conv_mem= 640K, ext_mem= 3,264K, Total RAM= 3,904K
 386 Clocked at 39.1 MHz
 Reading from memory.  
 MegaByte#:      --------- Memory Access Block sizes (KB)-----
       1    2    4    8   16   32   64  128  256  512 1024 2048 4096 <-- KB
 0:   83   82   82   82   82   82   82   82   82   82   --   --   --    us/KB
 1:   83   82   82   82   82   82   82   82   82   82   82   82   --    us/KB
 2:   83   82   82   82   82   82   82   82   82   82   82   82   --    us/KB
 3:   83   82   82   82   82   82   82   82   82   82   82   --   --    us/KB
 4:   83   82   82   82   82   82   82   82   --   --   --   --   --    us/KB

 Extra tests----
 Wrt   41   41   41   41   41   41   41   41   41   41   41   41   --<-Writing
 This machine does not seem to have any cache.
    Main memory speed --  13.4 MB/s  78.2 ns/byte (100%) [reading]  11.7 clks
    Effective RAM access time (read ) is 156ns (a RAM bank is 2 bytes wide). 
    Effective RAM access time (write) is  78ns (a RAM bank is 2 bytes wide). 
    386 Clocked at 39.1 MHz.  Cache ENABLED.
 Options: -t0

And here is the output from cachechk with both jumpers off (default setting of the motherboard):

 CACHECHK V7 11/23/98  Copyright (c) 1995-98 by Ray Van Tassle. (-h for help)
 CMOS reports: conv_mem= 640K, ext_mem= 3,264K, Total RAM= 3,904K
 386 Clocked at 39.1 MHz
 Reading from memory.  
 MegaByte#:      --------- Memory Access Block sizes (KB)-----
       1    2    4    8   16   32   64  128  256  512 1024 2048 4096 <-- KB
 0:   39   39   39   40   40   40  125  124  124  124   --   --   --    us/KB
 1:   39   39   39   41   40   40  125  125  125  125  126  126   --    us/KB
 2:   39   39   39   41   40   40  125  125  125  125  126  126   --    us/KB
 3:   39   39   39   41   40   40  125  125  125  125  126   --   --    us/KB
 4:   39   39   39   41   40   40  125  125   --   --   --   --   --    us/KB

 Extra tests----
 Wrt   41   41   41   41   40   41   41   41   42   42   42   42   --<-Writing
 This machine seems to have one cache!? [reading]
    !! cache is   32KB--  27.6 MB/s  38.0 ns/byte (313%)         
 >>>> If you think you do have L2 cache, you might have FAKE CACHE chips! <<<<
    5.7 clks
  Hmmm. It looks like RAM at megabyte #1 is REALLY slow!
  Hmmm. It looks like RAM at megabyte #2 is REALLY slow!
  Hmmm. It looks like RAM at megabyte #3 is REALLY slow!
  Hmmm. It looks like RAM at megabyte #4 is REALLY slow!
    Main memory speed --   8.8 MB/s  119.8 ns/byte (100%) [reading]  17.8 clks
    Effective RAM access time (read ) is 239ns (a RAM bank is 2 bytes wide). 
    Effective RAM access time (write) is  79ns (a RAM bank is 2 bytes wide). 
    386 Clocked at 39.1 MHz.  Cache ENABLED.
 Options: -t0

Also here's the output of ctcm.exe with both jumpers off (default)

XMM not installed     !
CTCM uses Memory from address   00120000
Int15-Memory=3145728

CTCM, translated by Thomas Pabst, copyright ct-Mag. V1.5b/t2
Processor-Timing   : i386DX,i386SX
Processor CPUID    : unknown  
Clck               : 40.0 MHz
internal Bus       : 32 Bit between CPU and primary Cache or Memory          
FPU                : 80387-Typ
L1 Cache           : 32 KByte, direct mapped
L2 Cache           : not found or not active or more than 8 times associative 
Write Strategy  L1 : Write Back

         Through Put & Bus Performance: Main Memory from  00120000

Best Time for  16K MOVSD (Cache /Page Hits) :   417 mcs -  39.3 MByte/s
average t. for 16K MOVSD (Miss + Hit)       :  2121 mcs -   7.7 MByte/s
average t. for 16K MOVSD (if  clean)        :  2121 mcs -   7.7 MByte/s
average t. for 16K MOVSD (if  dirty)        :  2122 mcs -   7.7 MByte/s
Main Memory    16K MOVSD (Cache misses)     :  2121 mcs -   7.7 MByte/s

average under   DOS     (640K):  1930 mcs -   8.5 MByte/s
average under   Windows (4MB) :  1930 mcs -   8.5 MByte/s

and ctcm.exe with both jumpers on:

XMM not installed     !
CTCM uses Memory from address   00120000
Int15-Memory=3145728

CTCM, translated by Thomas Pabst, copyright ct-Mag. V1.5b/t2
Processor-Timing   : i386DX,i386SX
Processor CPUID    : unknown  
Clck               : 40.1 MHz
internal Bus       : 32 Bit between CPU and primary Cache or Memory          
FPU                : 80387-Typ
L1 Cache           : not found or not active or more than 8 times associative 
L2 Cache           : not found or not active or more than 8 times associative 

         Through Put & Bus Performance: Main Memory from  00120000

Best Time for  8K MOVSD (Cache /Page Hits) :   693 mcs -  11.8 MByte/s
average t. for 8K MOVSD (Miss + Hit)       :  1418 mcs -   5.8 MByte/s
average t. for 8K MOVSD (if  clean)        :  1418 mcs -   5.8 MByte/s
average t. for 8K MOVSD (if  dirty)        :  1418 mcs -   5.8 MByte/s
Main Memory    8K MOVSD (Cache misses)     :  1418 mcs -   5.8 MByte/s

average under   DOS     (640K):  1331 mcs -   6.2 MByte/s
average under   Windows (4MB) :  1331 mcs -   6.2 MByte/s

Speedsys still refuses to test the memory.

How do you interpret this?

 

[Uniballer]

How about JP13 and JP14 (visible on Anonymous Coward's motherboard picture 2 ISA slots to the left of the cache RAM)?

 

[jh1523]

How about JP13 and JP14 (visible on Anonymous Coward's motherboard picture 2 ISA slots to the left of the cache RAM)?

That motherboard is quite different from mine; apart from cache placement, all components are located in different places. There is no JP13 or JP14. The 8-bit ISA slot is 2nd from right, etc. In the place where JP13 and JP14 are in that pic, my motherboard has a 74HCTLS244 chip and a quartz crystal. I can't find any JP13 or JP14 anywhere.

 

[Uniballer]

How do you interpret this?

Clearly you had 32KB of cache with the jumpers in the default position. And just as clearly the cache does not work with the jumpers both in. Interesting that when the cache is not working (disabled?) the cache miss time is shorter than with the cache enabled. Note that the main memory time when the cache is disabled (82 ns) + the cache hit time (41) is close to the cache miss time (125). As in let's write to the cache RAM after reading from main memory. Interesting. To the best of my knowledge the best implementations try to overlap those operations (or at least try to minimize the impact on the CPU).

Possibilities: (A) more option jumpers are needed, or the chipset doesn't actually work right with the jumpers changed.
(B) the jumpers tell the chipset to expect a deeper tag RAM (e.g. they enable additional address lines to the tag and data RAMs).
(C) something else that we just don't understand.

Can you figure out what signals the jumpers connect to? Do they go to the cache/tag RAMs (pinouts easy to find)? ISA bus signals? CPU signals?