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What's the difference between a 8085 processor and a Z80?

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Someone mentioned this on another forum, though I don't know a lot about the 8085, though they were saying that an 8085 was more like an 8086 and perhaps more advanced than a Z80. What puzzles me is Computers and Games Machines were using Z80, and the early Nintendo Gameboys had an Z80 in it into the late 80s early 90s. Were 8085s more technically advanced though like a Beta Video Recorder of the 80s, VHS got the better of it?

Also I need some reminder about which was first between 8086 and 8088. I think 8086 came first, but was more powerful in the Data Bus than the later 8088. Unsure about this though. :(
 
8085 is an Intel product whereas Z80 was by Zilog. The similarity is that they are both 8-bit MPUs. 8085s although, in my opinion, a better chip were tricky to support due to the multiplexing of some of the legs requiring external latching.

Out of the 8086 (16-bit data bus) and 8088 (8-bit data bus) was first and was used by IBM in the Displaywriter System Word Processor (1980). Later (August 1981), IBM chose the 8088 for the IBM PC because its 8-bit data bus was cheaper to support. The prior IBM System/23 Datamaster (July 1981) used the 8085.
 
Hi,

As mentioned, the 8085 was made by Intel, the Z80 by Zilog.

The 8085 is a very close relative of the 8080 and off the top of my head the main difference was the addition of RIN and SIN but there may be others.

The Z80 was like an 8080 with fewer power supply requirements, dynamic RAM refresh on-chip, an alternative set of registers and index registers.

The Z80 instruction set is compatible with 8080 in that a Z80 will run 8080 code but not the other way round (because of the other features).


Cheers,

Andy.
 
The Wikipedia articles are a reasonable place to start for a quick overview:

http://en.wikipedia.org/wiki/Intel_8080


http://en.wikipedia.org/wiki/Intel_8085:

The Intel 8085 is an 8-bit microprocessor introduced by Intel in 1977. It was binary compatible with the more-famous Intel 8080 but required less supporting hardware, thus allowing simpler and less expensive microcomputer systems to be built.

The "5" in the model number came from the fact that the 8085 requires only a +5-volt (V) power supply rather than the +5V, −5V and +12V supplies the 8080 needed. Both processors were sometimes used in computers running the CP/M operating system, and the 8085 also saw use as a microcontroller, by virtue of its low component count. Both designs were eclipsed for desktop computers by the compatible Zilog Z80, which took over most of the CP/M computer market as well as taking a share of the booming home computer market in the early-to-mid-1980s.

The 8085 is a conventional von Neumann design based on the Intel 8080. Unlike the 8080 it does not multiplex state signals onto the data bus, but the 8-bit data bus was instead multiplexed with the lower part of the 16-bit address bus to limit the number of pins to 40. Pin No. 40 is used for the power supply (+5v) and pin No. 20 for ground. Pin No. 39 is used as the hold pin. Pins No. 15 to No. 8 are generally used for address buses. The processor was designed using nMOS circuitry and the later "H" versions were implemented in Intel's enhanced nMOS process called HMOS, originally developed for fast static RAM products. Only a 5 Volt supply is needed, like competing processors and unlike the 8080. The 8085 uses approximately 6,500 transistors.[1]

The 8085 incorporates the functions of the 8224 (clock generator) and the 8228 (system controller), increasing the level of integration. A downside compared to similar contemporary designs (such as the Z80) was the fact that the buses required demultiplexing; however, address latches in the Intel 8155, 8355, and 8755 memory chips allowed a direct interface, so an 8085 along with these chips was almost a complete system.


http://en.wikipedia.org/wiki/Zilog_Z80

The Z80 offered many real improvements over the 8080:

An enhanced instruction set including bit manipulation, block move, block I/O, and byte search instructions

New IX and IY index registers with instructions for direct base+offset addressing

A better interrupt system
A more automatic and general vectorized interrupt system, mode 2, as well as a fixed vector interrupt system, mode 1, for simple systems with minimal hardware (mode 0 being the 8080-compatible mode).
A non maskable interrupt (NMI) which can be used to respond to power down situations and/or other high priority events (and allowing a minimalistic Z80 system to easily implement a two-level interrupt scheme in mode 1).
Two separate register files, which could be quickly switched, to speed up response to interrupts

Less hardware required for power supply, clock generation and interface to memory and I/O
Single 5 volt power supply (the 8080 needed -5V/+5V/+12V)
Single-phase 5 V clock (the 8080 needed a two-phase high-amplitude clock generator)
A built-in DRAM refresh mechanism that would otherwise have to be provided by external circuitry
Non-multiplexed buses (the 8080 had state-signals multiplexed onto the data bus)

The Z80 took over from the 8080 and its offspring, the 8085, in the processor market, and became one of the most popular 8-bit CPUs. Perhaps a key to the initial success of the Z80 was the built-in DRAM refresh, and other features which allowed systems to be built with fewer support chips (later on, most Z80 systems have been embedded systems, which typically uses static RAM and hence does not need this refresh).
 
I began developing for the 8085 around 1976. The particular product that I worked on used two 8085--one for the CPU and one to control the printer. The 8085 was well suited to embedded applications--it was simple to interface to and there were a few peripheral chips that could really cut parts count (e.g. 8355). The on-chip prioritized "half interrupts" made things even easier--no need for a dedicated interrupt controller.

Because the 8085 really enjoyed its popularity in the embedded applications, it's easy to make the pronoucement that it wasn't a popular chip. Nothing could be further from the truth--Intel and its licensees sold an ocean of the 8085 and 80C85s--it was a very profitable product line.

One mistake that Intel made that still peeves me was the initial non-disclosure of the extra instructions that would have made life much more easy.
 
You should be aware that there's a chip from National, the NSC800, that is sort of a hybrid between the Z80 and 8085. Multiplexed data and address bus, half-interrupts, Z80 instruction set (no RIM/SIM bit-banger I/O) and some configuration options that can only be accessed with an indirect I/O instruction (e.g. OTI) at port 0BBh. The signals are very close to the 8085 (some are inverted). The TRAP vectors to 0066 (Z80 location) and not 0024 (8085).

I think it'd be safe to say that most 8-bit folks don't know of the chip.
 
Nope, can't say I've heard of that Processor before. Interesting. My Dad had a National Tape Player which had a heap of stuff on it until my Brother Pulled it apart, I had a National Walkman, a friend of ours has a National Radio, we even got a National VHS Tape somewhere, so I guess it's no real surprise they did a heap of stuff. I think Panasonic took them over didn't they?
 
The 8085 is a very close relative of the 8080 and off the top of my head the main difference was the addition of RIN and SIN but there may be others.

There were also instruction timing differences. The most notable would be the ubiquitous MOV (one cycle less).
 
Nope, can't say I've heard of that Processor before. Interesting. My Dad had a National Tape Player which had a heap of stuff on it until my Brother Pulled it apart, I had a National Walkman, a friend of ours has a National Radio, we even got a National VHS Tape somewhere, so I guess it's no real surprise they did a heap of stuff. I think Panasonic took them over didn't they?

Are we talking about the same "National"? I mean "National Semiconductor Corporation". I've seen NSC LCD watches, even video games, but never the usual consumer stuff, such as tape players. NSC learned to stick to ICs after a few abortive adventures into the consumer market.

102666030.lg.jpg
 
One valuable addition to the 8080 CPU was the TRAP/NMI pin. We arranged to have a key combination on the keyboard of our box decoded to trigger the TRAP line. This was very useful if you got into a program hang--the servicing routine would display the register contents and enter a simple debugger. This was very useful to program development.
 
You're not serious, surely? Even 5 interrupts weren't enough in the project I worked on--we added an 8259 PIC.

Here are some ideas of what we used them for. End-of-frame interrupt in video (required for resetting the DMA to the CRTC), key-pressed interrupt, timer interrupt, floppy operation complete, RS232 input/output, printer buffer empty/error, hard disk interrupt. There were more. The TRAP was used for bus and memory errors.

All really necessary for a multi-user system, which ours was.
 
Ok, well explained! A beginners dumb question! ;)
What was Intel's original aim with the 8085? It seems very multipurpose!
 
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With Intel, it's hard to say exactly--but it's pretty clear that the 8085 satisfied three objectives. The first was simplification--a chip that took a single-rail (+5V) power supply instead of three (+12, -5, +5), required no special-function chips (e.g. 8284, 8288 ) to get to basic functionality. The second was to answer the challenge posed by the Z80. The third was a chip for embedded use--I don't think that Intel was yet considering the personal computer market. You can have a more or less complete 8085 system with the addition of one or two chips (e.g. 8155). But even as far back as 1976, Intel was promising a 16-bit chip, so it was pretty clear that Intel saw the 8085 as the end of the 8-bit general purpose line.

One puzzle that's never been solved to me is Intel not exposing the small number of added instructions in its product documentation, with the exception of RIM and SIM (which was necessary, given that these are also tied into I/O and interrupt functionality). But, to my knowledge, the only licensee to discuss the other additions was Tundra.
 
You're not serious, surely? Even 5 interrupts weren't enough in the project I worked on--we added an 8259 PIC.

Here are some ideas of what we used them for. End-of-frame interrupt in video (required for resetting the DMA to the CRTC), key-pressed interrupt, timer interrupt, floppy operation complete, RS232 input/output, printer buffer empty/error, hard disk interrupt. There were more. The TRAP was used for bus and memory errors.

All really necessary for a multi-user system, which ours was.

How do you manage multiple interrupts in a Z80 system? Or what was the most common approach? Particular how to determine what has the highest priority on INT? 8259 or alike?
 
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The Z80 has three interrupt modes. The first is simply to vector to 0038H (RST 7)--basically the CPU gates an FFh onto the bus. The second mode is akin to the 8085/8080 mode using an 8259 PIC. The third is a Z80-uniqe mode, where each interrupting peripheral places an 8-bit vector number (with bit 0 = 0) and is combined with a CPU-furnished high-order 8 bits of a vector table address. Control is transfered to the routine that's pointed to by the 2-byte entry in the vector table. So you get 128 interrupts.

You'd think that the third mode (IM 2) would be most used, but it's not. The problem is that the Z80 does not prioritize interrupts--and you really want that. Most if not all of the Z80 peripheral chips (e.g. CTC, DMA) allow themselves to be incorporated into a daisy-chain interrupt scheme, but that lacks the flexibility of an interrupt controller such as the 8259 that allows one to rearrange priorities. The Z80 scheme is pretty much "hard-wired".
 
The Z80 has three interrupt modes. The first is simply to vector to 0038H (RST 7)--basically the CPU gates an FFh onto the bus. The second mode is akin to the 8085/8080 mode using an 8259 PIC. The third is a Z80-uniqe mode, where each interrupting peripheral places an 8-bit vector number (with bit 0 = 0) and is combined with a CPU-furnished high-order 8 bits of a vector table address. Control is transfered to the routine that's pointed to by the 2-byte entry in the vector table. So you get 128 interrupts.

You'd think that the third mode (IM 2) would be most used, but it's not. The problem is that the Z80 does not prioritize interrupts--and you really want that. Most if not all of the Z80 peripheral chips (e.g. CTC, DMA) allow themselves to be incorporated into a daisy-chain interrupt scheme, but that lacks the flexibility of an interrupt controller such as the 8259 that allows one to rearrange priorities. The Z80 scheme is pretty much "hard-wired".

Good job on that, Chuck. Surely you must be getting all the above from a script. How can you possible pull all that down from memory at our age? Merry Christmas & a Happy New Year
 
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