First off I would check the following pins in the order I have specified:
UE8 pins 2, 4, 6, 8, 17, 15 and 13. These pins should have square waves on them with each successive pin being half the frequency of the prior pin.
Next would be the two ICs in the order specified:
UE9 pins 2, 4, 6, 8, 17, 15 and 13.
Followed by:
UE10 pins 4, 6, 8, 17, 15, 13 and 2.
Note that UE10 has the same pin numbers as UE9 - just in a different order.
Again, these pins should have square waves on them with each successive pin being half the frequency of the prior pin.
UE8 multiplexes the row refresh signal onto the address lines of the RAM.
UE9 and UE10 each multiplexes half of the buffered address lines onto the address lines of the RAM.
Let's just see if everything is as it should be before we look at UA19.
Dave