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General question about ISA bus and memory layout

T

tom1000000

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Hi,
We know that IBM made some mistakes designing the IBM PC/XT. One mistake was mapping interrupts to Intel CPU reserved IRQ numbers.

Why didn't IBM design the ISA bus with fixed memory / IO Port locations?
IBM could of assumed the PC would never have more than 8 slots.
So the ISA socket could of had 3 extra pins with a unique "address" hardcoded by the motherboard manufacturer.
Then the memory map could of been simplified as:
0 - 640KB - Normal RAM
640KB - 896KB - VGA Memory (256KB in size)
896KB - 1024KB - 8 * 16KB ISA Devices (the 8th slot would be reserved for BIOS)

IO Port Mapping could of been very simple:
8 * 0x1000 regions reserved, starting at 0x8000

IRQ Mapping would of been simple as well:
8 interrupts reserved for each device, starting at 196 (256-64).

IBM should of required that ALL ISA devices have a standardised header as determined by doing a read on first 16 IO PORTs or first 16 bytes of memory region.
For example it could of been:
Bytes 0 - 3 - 'ISA' + 0x00
Bytes 4 - 11 - vendor name: 'NUMBER9', 'TSENG', 'MATROX', 'ADAPTEC' etc (max 8 chars, null for unused chars)
Bytes 12 - 13 - 2 byte device id
Byte 14 - revision
Byte 15 - checksum

This would have completely removed the possibility of memory conflicts and also got rid of jumpers for ISA devices.
Device auto configuration would have been simple.
IBM have a lot to answer for!
 
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That assumes IBM could have forecast where the industry would need to be in 6 years when the plan for all PCs was to replace the entire line in about 5 years.

The original IBM PC had 512kB of RAM maxiumum with 11 available slots including an expansion chassis (well, 13 slots really but one slot in each is needed for the connecting card). CGA cards had 32kB of RAM plus the additional monochrome address space. You will be sacrificing nearly 20% of the total address space in expectation of video cards that won't start shipping for 3+ years when EGA with daughtercards came with 256kB.

16 kB is probably too little for many ROMs and you also need additional address space for data transfer let alone BIOS plus BASIC. Your design would also kill EMS and therefore Lotus would run out of steam quite early. Good for Apple as CFOs move to Excel on the Mac. Big address spaces were also needed for servers with SCSI controllers so you will have pushed the IBM PC out of the networking market. SUN, DEC, and the AS/400 team will say thank you; Novell won't.
 
tom1000000 said:
e know that IBM made some mistakes designing the IBM PC/XT. One mistake was mapping interrupts to Intel CPU reserved IRQ numbers.
Click to expand...

We do? What reserved interrupt numbers are those? Are you perhaps confusing 8259 IRQ numbers with 8088 interrupt vector numbers? Depending on ICW2, you can move the 8259 IVT on any 8 interrupt boundary within the 8088 IVT.

I don't get your point about pre-assigning memory and I/O port locations. As far as requiring headers, consider that no devices in the original PC had BIOS ROM attached--as a matter of fact, BIOS extensions weren't supported in the original 5150 BIOS. Remember too, that the original 5150 had only 64K of planar RAM and the original XT only 256K. Where in your scheme of pre-assigned areas, would RAM add-on boards fit?

There are things that I don't like about the original PC design, such as most cards decoding only 10 bits of the I/O address, but that wasn't a deficiency in the original design--there are I/O cards that decode all 16 bits--but just an economy move early on.

Considering the state of the art in personal computers back then, the 5150 wasn't too bad.
 
One important factor of the IBM 5150 is that they wanted lots of third party option cards. Giving them a limited resource window, single interrupt, and forcing an EPROM on to each card probably wouldn't have been a good starting point. As it is, you could hook in to the system with a simple address decoder, and play with your prototype using something as simple as debug.com.

Keeping it flexible would be my preference. If I was to do anything different, I would have put video starting backwards from F000 rather than starting with B000. That way the maximum conventional memory "line" could be adjusted - although in fairness allowing the user to extend the memory to ten times the original spec was pretty generous.
 
OK I realise my original idea was badly planned, I forgot the memory regions are limited and there are small number of IRQs.

But the fact is IBM could of made ISA a "plug n play" bus from day one.

This could be achieved by 4 extra pins on the ISA connector, giving each slot a unique ID (up to 16).
Then the IO Ports (nothing else) would be preallocated:
IO region 0xC000 - 0xFFFF - 1024 IO Ports per slot

The first 32 IO Ports would be a standardised layout (sort of like PCI header):
Code: 
Bytes  0 - 1          'IS'
Bytes  2 - 3          standard device flags e.g. if bit 0 set then cga at iobase+03D0h-03DFh, bit 1 then floppy at iobase+0x03F0-0x03F7 etc, more than one bit can be set
Bytes  4 - 5          2 byte device id
Byte   6              device revision
Byte   7              memory mapping, min size (in 2KB blocks e.g. 1 = 2KB, 128 = 256KB)
Byte   8              memory mapping, max size (in 2KB blocks e.g. 1 = 2KB, 128 = 256KB)
Byte   9              number of IRQs required (low 4 bits = min, high 4 bits = max)
Bytes 10-11           bitmap of IRQ lines that are physically connected to the ISA device
Bytes 12-13           bitmap of DMA lines that are physically connected to the ISA device
Byte  14              number of DMAs required (low 4 bits = min, high 4 bits = max)
Bytes 15 - 23         vendor name e.g. 'NUMBER9', 'TSENG', 'MATROX', 'ADAPTEC' etc (max 9 chars, null for unused chars)
Byte  24              checksum of bytes 0 - 23
The following io addresses are written to to configure the device, by BIOS / OS:
Byte  25              size of memory map
Byte  26-27           memory map base segment address (eg A000 = at 640k)
Bytes 28-29           irq enable: set bit(s) to assign IRQ(s) to device
Bytes 30-31           dma enable: set bit(s) to assign DMA(s) to device

With this design, the BIOS could dynamically assign the CGA/VGA memory to any address in the 1MiB address space.
Also, there could be 2 or more ISA VGA cards.

I suppose in 1980, an "auto-configure" computer bus would of been a major technology leap.
 
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PCI went a similar direction years later with the notion of a configuration description address space and conforming layout.

We can talk all day about what shoulda, coulda, woulda been done better in hindsight. The PC was an unusual project at IBM as it bypassed a lot of the design standards red tape. Most of the original plans were drawn on napkins and loose paper. It was designed for (relative) cost and to get to an aggressive launch date. As the engineering phrase to marketing goes, "design quickly, design cheaply, design quality - pick two!"

I could extend your logic and debate about why IBM did not implement more of a Harvard like system design and use the separate ES/DS/CS/SS indications provided by the S3/S4 signals to get a full 1MB of address space for each segment reference. But that would be even more pointless.
 
Sounds like a great project for someone with loads of time though - build a PC the way it should have been done in the first place - like the custom car guys do - V8 ford Capri with Sierra suspension - all Ford, but WAY better than anything they actually produced!

Of course - whoever builds it will have to produce some sort of OS, and then an emulator to turn it back into a PC so it has some software - and so we're back at square one again .... :rolleyes:
 
I view the 5150 as pretty much the lowest common useful denominator. Competition for the Apple II and various X80 boxes.

Consider the following: If this were intended as a general-purpose do-everything system, the bus would have been at least 16 bits and an 8086 used for the CPU (as used on the earlier DisplayWriter). A system released by IBM at almost exactly the same time used a 68000 CPU and a "real" bus (Versabus):

IBM_ICS_System_1.jpg
 
The Wang Professional Computer did something similar — the motherboard I/O ports are from 1000h-10FFh, a card in the first slot appears at 1100h-11FFh, the second slot at 1200h-12FFh and so on. Reading from port xxFE returns a device class in the low 7 bits, and the top bit is set if the card raised an interrupt.
 
If IBM woulda just used Zorro II, they coulda killed two birds with one stone:

They'd had a great bus instead of ISA, and Amigas woulda not needed those silly ISA slots.

:p
 
It would have been something a feat for IBM to use the Zorro II bus considering the Amiga 2000 wasn't released until three years after the IBM AT. ;)
 
I think it's worth comparing the 8 bit ISA bus with two micro "professional" buses of the time, Versabus (morphing to VMEBux) and Multibus. Either was far more capable than ISA, but also more costly to implement. Neither terra incognita in 1981.

So you have the reason for ISA in a nutshell - cost. The PC was intended to be a low-end 8-bit entry. Speculation of what could have been is ridiculous.
 
Indeed. It's not as if anything else in the same category was much better; in principle the Apple II's slot address signals make it possible to build a (relatively simple) peripheral with less decoding than 8 bit ISA but ISA is probably an improvement over utter free-for-alls like S-100. Heck, we're probably lucky the 5150 had slots that took interchangeable cards at all. IBM could have just put a couple headers on the board for specific boards like disk and video controllers and run a bus connector out the back, ala a TRS-80. Then you'd have both decoding/configuration *and* physical issues to deal with when expanding the system. They did it with the Jr...
 
Yep, it's important to remember that the PC was intended as sort of an experiment to check if there was space in the microcomputer market for IBM at all. They kept things simple, as it was not intended to become such a big deal. When they really realized what the PC had become a big deal, they tried going more sophisticated with the PS/2 but then it was already too late.

To this day, the intel IA-32 CPU manuals still mentions some of the more unorthodox "simplistic" design choices of the original IBM PC (Numeric coproccessor interrupt sendt over a "masked" non-maskable-interrupt line).
 
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Well, I really don't like the idea of having anything unique about a particular slot. I still remember some badly coded Apple II programs where one required the device in one particular slot, and yet another required the same device in a different slot.
 
And slot 3 might be slot 0 and slot 0 might be slot 3, a la //e.

Though, generally it did work very well. I even liked the way the slots in the GS worked.
 
Eudimorphodon said:
Indeed. It's not as if anything else in the same category was much better; in principle the Apple II's slot address signals make it possible to build a (relatively simple) peripheral with less decoding than 8 bit ISA but ISA is probably an improvement over utter free-for-alls like S-100. Heck, we're probably lucky the 5150 had slots that took interchangeable cards at all. IBM could have just put a couple headers on the board for specific boards like disk and video controllers and run a bus connector out the back, ala a TRS-80. Then you'd have both decoding/configuration *and* physical issues to deal with when expanding the system. They did it with the Jr...
Click to expand...

What took me aback with the 5150 is the flimsy design of the expansion cards. Good enough maybe for Apple II type stuff, but other than for low-end personal computers, the general rule was a card cage with some provision for good airflow. Even the NEC 9800/APC machines obviously had thought put into the C-Bus. Here's a C-Bus card:

721px-PC-FXGA%28C-BUS%29_01.jpg
 
I thought the IBM PC card connector was inspired by the System/23 DataMaster with a few minor changes like the screwed down bracket. Getting any major changes to the IBM PC would have meant altering much of IBM's other development efforts from 1975 on. I have seen a lot of proposed alternate IBM PC concepts taking after the mainframe design teams. The result probably would have been slightly better in 1990 but could IBM sustain PC sales with units priced over $10,000?
 
Chuck(G) said:
What took me aback with the 5150 is the flimsy design of the expansion cards.
Click to expand...

I don't think the physical design of the cards themselves is that bad, so far as they at least have a screw to secure them and an external backplate connected to the card for ports. (Unlike Apple II cards, which have neither.) It is sort of amazing how poorly designed the 5150 is so far as airflow goes, however. There's just the one fan listlessly stirring the air above the power supply and the cards go right up to the lid, which puts every one of them besides the one closest to the drive in an unventilated backwater.
 
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