tom1000000
Member
Hi,
We know that IBM made some mistakes designing the IBM PC/XT. One mistake was mapping interrupts to Intel CPU reserved IRQ numbers.
Why didn't IBM design the ISA bus with fixed memory / IO Port locations?
IBM could of assumed the PC would never have more than 8 slots.
So the ISA socket could of had 3 extra pins with a unique "address" hardcoded by the motherboard manufacturer.
Then the memory map could of been simplified as:
0 - 640KB - Normal RAM
640KB - 896KB - VGA Memory (256KB in size)
896KB - 1024KB - 8 * 16KB ISA Devices (the 8th slot would be reserved for BIOS)
IO Port Mapping could of been very simple:
8 * 0x1000 regions reserved, starting at 0x8000
IRQ Mapping would of been simple as well:
8 interrupts reserved for each device, starting at 196 (256-64).
IBM should of required that ALL ISA devices have a standardised header as determined by doing a read on first 16 IO PORTs or first 16 bytes of memory region.
For example it could of been:
Bytes 0 - 3 - 'ISA' + 0x00
Bytes 4 - 11 - vendor name: 'NUMBER9', 'TSENG', 'MATROX', 'ADAPTEC' etc (max 8 chars, null for unused chars)
Bytes 12 - 13 - 2 byte device id
Byte 14 - revision
Byte 15 - checksum
This would have completely removed the possibility of memory conflicts and also got rid of jumpers for ISA devices.
Device auto configuration would have been simple.
IBM have a lot to answer for!
We know that IBM made some mistakes designing the IBM PC/XT. One mistake was mapping interrupts to Intel CPU reserved IRQ numbers.
Why didn't IBM design the ISA bus with fixed memory / IO Port locations?
IBM could of assumed the PC would never have more than 8 slots.
So the ISA socket could of had 3 extra pins with a unique "address" hardcoded by the motherboard manufacturer.
Then the memory map could of been simplified as:
0 - 640KB - Normal RAM
640KB - 896KB - VGA Memory (256KB in size)
896KB - 1024KB - 8 * 16KB ISA Devices (the 8th slot would be reserved for BIOS)
IO Port Mapping could of been very simple:
8 * 0x1000 regions reserved, starting at 0x8000
IRQ Mapping would of been simple as well:
8 interrupts reserved for each device, starting at 196 (256-64).
IBM should of required that ALL ISA devices have a standardised header as determined by doing a read on first 16 IO PORTs or first 16 bytes of memory region.
For example it could of been:
Bytes 0 - 3 - 'ISA' + 0x00
Bytes 4 - 11 - vendor name: 'NUMBER9', 'TSENG', 'MATROX', 'ADAPTEC' etc (max 8 chars, null for unused chars)
Bytes 12 - 13 - 2 byte device id
Byte 14 - revision
Byte 15 - checksum
This would have completely removed the possibility of memory conflicts and also got rid of jumpers for ISA devices.
Device auto configuration would have been simple.
IBM have a lot to answer for!
Last edited: