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8088 minttin

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Mike B. - it's been said by Kelly himself that he never takes me seriously. I guess I was wrong...everyone's entitled to their moods. I got into the habit of calling him "the hoser" cuz while I was in NJ, and part of that other group, we used to poke phun at him from living...almost in Buffalo, which is just next to Canada. Actually just way up north in the state, further then anyone else.
No harm was meant. Typically he doesn't react to my ribbing at all.
 
Lets just make sure we all try to keep it civil. And remember the golden rule about posting - if it takes less than 30 seconds to post, it probably shouldn't have been posted.
 
Sorry for not being here in so long but I decided not to use the 8088 and to either use the z80a running at 4Mhz or a nec v15 UPD70108-8 running at 8Mhz and im not sure which.Anyone have a website name that gives info about them?And does anyone know a website which sells IC's?Someone please check to see if this equation to find RAM speed is right. 1/(1/ns)
 
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Im new to making computers (havent made one yet).Im looking for a simple easy to make one to get me started.There is a site called www.jameco.com that is selling a 100 piece assortment of microprocessors , PALs , EPROM, RAMs, PROMs. Do you think its worth it for 12.95?I need a single board system with a mini keyboard,screen,at least 8k of EPROM and 8k or SRAM.Any suggestions for parts from jameco?
 
There is a site called www.jameco.com that is selling a 100 piece assortment of microprocessors , PALs , EPROM, RAMs, PROMs. Do you think its worth it for 12.95?

I don't know what devices they're selling but YES

UncleBinary said:
I need a single board system with a mini keyboard,screen,at least 8k of EPROM and 8k or SRAM,and maybe a spare parrelel port.Any suggestions for parts from jameco?

The easiest way to get a screen is to use a UART (I found the Intel 8251 to be easy, with some example code on z80.info) and attach it to a regular PC running a terminal program such as Kermit or Hyper Terminal (which I hate).

For RAM and ROM, you might as well implement 32K ROM and RAM, A because it's easier and B you'll have more space.

It's easier because you can attach an inverter (74LS04, pin 1 for input and pin 2 for output) to Address 15 of the microprocessor, the inverted signal can be the Chip Select for the upper 32K of the 64K address space, the non inverted signal is the lower. There might also be some other logic necessary if you're going to use a Z80, because they have separate address spaces for I/O ports and memory which also need to be decoded.

In this case, this is what I think could work. Get yourself a 74LS32 Quad OR gate. Attach the output of one of the gates (say pin 3) to the RAM and another (say pin 6) to the ROM. Attach the Memory Select pin of the Z80 to one of the inputs on both of the OR gates (pin 1 and 4). Attach the previously mentioned inverter's output to the remaining input on the RAM's OR gate (pin 2) and Address 15 of the Z80 to the final remaining pin on the ROM's OR gate (pin 5).

What you have now is a circuit that will enable either the RAM or ROM when the Z80 wants to address memory space, not I/O space.

Why an OR gate? Because all of the signals in question are negative logic, meaning that when the CPU or memory or whatever makes/sees the signal as a binary 1 it is at ground potential, not +5v. This isn't insane because it can be useful in certain conditions, which I won't go into here. De Morgan's law is something like an an OR gate can be made a AND gate if the inputs and the output are inverted. Because we want to AND together the Memory Select signal and the Chip Select signal (Memory AND the chip must be selected before it's enabled) we need to use an OR gate. If we used an AND gate we would have to invert both of the inputs and the output, because of De Morgan's law.

If you want I can post you a schematic that will select I/O devices too.

Whew. Hope this gives you something to work with.

Thrashbarg.

EDIT: I didn't actually answer your question. RAM is 62C256 (or a similar prefix, make sure you get static parallel RAM) and the ROM's I use are 28C256.
 
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Yeah I would try that circuit but since i want it as compact and as easy to make due to fact I never made a computer before I want to keep the keep count to a low even if it means sacrificing some memory.I really want the chip count to be 5 or 6.In todays world finding a SRAM chip that is speed compatible with 4Mhz at 4 clock cycles per opcode fetch is hard.I haven't found a SRAM chip under 500 ns.
 
Yeah I would try that circuit but since i want it as compact and as easy to make due to fact I never made a computer before I want to keep the keep count to a low even if it means sacrificing some memory.I really want the chip count to be 5 or 6.In today's world finding a SRAM chip that is speed compatible with 4Mhz at 4 clock cycles per opcode fetch is hard.I haven't found a SRAM chip under 500 ns so thats why I would fanthom a computer hard to without making the whoe computer memory and all out of transistors and I dont have the money for that or the time.

Does anyone know of a way to interface like a 100-300 ns SRAM on a z80a? www.z80.com only uses old SRAM chips which are hard to find now-a-days.Oh ya i forgot i got the equation wrong.I believe it is 1/(1/1 billion*nscycletime).
 
Just doing some calculations, at 4MHz and 4 cycles per memory cycle, you'll get 1/1MHz which is 1uS. 500nS is half of that so you should be fine with even that slow RAM. Cache RAM out of 486's is about 120nS.

BTW, in case you've got the wrong idea about RAM timings (you might have, I don't know), it's how long it takes to look up the data in the chip and put it onto the data bus. It stays on the bus indefinitely. The only issue you'll have with RAM is if it's so slow the CPU operates faster than it - i.e. the RAM can't keep up.
 
no I dont have the timings mixed up just the equation a little bit.Thanks i thought i need 1000ns ram instead of 250 thank you for clearing that so now i can get to designing my computer.
 
www.jameco.com doesnt seem to have anything over 1k 250ns and up SRAM so do you reccomend another site?Is it possible and practical to directly connect a 200ns SRAM to a z80a during its opcode fetch?which runs at 4mhz completing a opcode every 4 clk cycles.
 
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Jameco sell 62256LP-12's which are 32KB 120nS devices. I think you're going the wrong way when it comes to the timings. You want them to be as small as possible so the RAM reacts to a new address quickly. Anything under 500nS will be fine, they all are anyway.
 
Thanks a lot.I thought you had to have the signals on for a certian time.Thanks for clearing that up for me.Does EPROM work in the same way a SRAM?Like the data on the data bus stays there indefinitly?In case you don't know my age it is 13 and yes i DONT have the following 1 common sense 2 ability to pick up even easy hints 3 a car to get the parts I need.Yes i know I type like im older.
 
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EPROM's are just like static RAM, except they need a higher voltage to be written to, typically 12V. I recommend EEPROM's (Electrically Erasable) which are about the same price as they act almost exactly like static RAM and are therefore easy to program. If you want to write protect the ROM to prevent the CPU from accidentally corrupting your boot monitor, just attach the Write Enable pin to +5v. It's active low so this makes sure it will never be activated.

EPROM's also have a problem when it comes to erasing them, you need a special ultra violet lamp which the chip is exposed to. This is why there's a window in EPROM's. The UV radiation emitted by these lamps is dangerous and can blind you. The other option is to leave them out in the sun for a few days, probably weeks, to erase them. But if you're developing and testing software this method takes way too long.
 
Ok I knew the difference between EEPROM and EPROM I just forgot the E in the last post.Trying to keep the chip count low I was thinking of using SRAM dirrectly connected to the CPU and have the 28C256-25 parralel EEPROM running at 250ns attached to a PIO port.Do you think that is a good idea?Oh ya UV lamps can give you skin cancer.
 
Attaching the boot ROM to a PIO is bad for three reasons, firstly the CPU can't access it directly to actually boot from, it can't actually execute code through a PIO and you'll need more chips for the PIO itself.

Attaching RAM to a PIO is equally as bad because things like stack operations will not work, plus it'll be much slower and the CPU won't be able to execute code from it.

It's much simpler to simply attach the RAM and ROM to the CPU as they were intended.
 
Ok.Point taken.So uh... anyway to do that what you reccomended with as least amount of chips possible?REMEMBER copmuter must be under 8 IC's so uh KISS. keep is simple stupid.If you can upload a picture of what your talking about.
 
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