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PDP-12 #435 at the University of Minnesota Duluth

The PDP-12 at the RICM is one of the newer versions that has the wider lower backplane that included the P & R rows. When this picture was taken the cables to the DW8E-PC Omnibus Expansion Chassis were not installed. The FlipChips that are populated in these rows in the RICM machine implement the more FlipChips for the EP12 PDP-12 Processor and KF12 Automatic Priority Interrupt option. The EP12 FlipChips look like they adds processor register gating that is related to the API option. The empty slots in the middle of the R row implement the DM12 3 Channel Data Break MUX option. Since we only have one Posibus Data Break device, the RK8F disk controller, we don't need the DM12.

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Could someone explain (or link to a correct description of) what EAE provided, and how I could tell whether our machine has the option? An early blog post says we have it, but I don't know if that's true or not. (We definitely don't have an FP option.)
 
If you have the big backplane you may also have the priority interrupt controller.

The EAE provides multiplication, division and normalization primitives which are useful for floating point emulation. Of course, if you had an FPP, the emulation with integer arithmetic was pretty lame, even with the EAE assist.

The EAE instructions are a bit similar I think, at least in power, to the hardware multiply and divide available in the LINC instruction set.

Vince
 
The EAE gives you a multiply, a divide, a 24 bit shift and a normalize operation. It greatly increases the speed of the floating point math routines that utilize it.

There are a handful of card slots that will be populated if you have an EAE. They will be empty if you don't have it. The backplane card placement print probably tells you what each slot does and probably has notes about the options. The backplane was always wired for all options so if the cards are not present you can still populate those slots if you can find the cards.

A PDP-12 is essentially a PDP-8/i and a TTL implementation of the LINC computer.

I see that VInce just posted a reply. I've been waiting for him to post the serial number of his 12.

And the priority interrupt controller is a a pretty neat option that I believe only was available on the 12.
 
I've been waiting for him to post the serial number of his 12.
Well, I'm sort of unclear about that. There's a plaque on the lower backplane that says
M36
OP
274
while on the upper backplane, it says
M36
MEM
597
On the back door, a glued/taped piece of paper gives yet another number, but that doesn't seem at all definitive.

Where should I be looking?

Vince
 
Thanks to both @vrs42 and @DougIngraham for their answers. We have our card placement doc so I'll check that. We do not have the large lower backplane, ours are both 6 columns wide.
 
Where should I be looking?
Our label is in the top left of the cabinet if you're looking in towards the tape drives. It is stamped PDP12 as in the picture above. Ours also has an M36 stamp.
 

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you may look into PDP12_MaintVol3_SchemsMar69.pdf (bitsavers) on page 84.There you can see the function of each backplane slot. EAE is option C=KE12. Thats 7 slots in row L, 5 slots row M.
Maybe as an indicator, if K27 is not populated you have EAE in. Your picture shows EAE is populated.

With my tests of EAE in pdp8/e, it is possible to speed up calculations factor 2. But 8/e EAE has some more features and might be more powerful. But even the small 4 Word path for focal speeds up to 40%.
I like EAE.

Have fun,
Volker
 
My explorations with @vrs42's PAL assembler (and `palbart` before that) found that the big benefit of the EAE (aside from the actual multiply and divide instructions) was the OPR instructions that gave you access to the Multiply Quotient register. This turns the 8 into a system with a sort of "depth-2 register stack" and lets you do things like OR the MQ into the AC so you finally have a single logical OR instruction, etc. This can be an incredible benefit to code density, as you're often saved from reading and writing to temporary memory locations (and then reading back in again, because DCA clears to the AC).

But the one gotcha' is that not all EAEs are equivalent. I think starting with the 8/e, they included a BSW instruction that would swap the two six-bit half-words in the AC. That isn't in the 8/I and by extension isn't in the 12 or the straight-8 EAE. That seems to be the most widespread caution.
 
Thw 8/E (and later, 8/A and the chip-based DECmates) add confusion because the base processor added the MQ register even without EAE. It could do the basic read/write/OR operations with the AC. They also added BSW and other non-standard/new instructions. Previously, machines without EAE could do a group 3 CLA (7601), and that was it. (The 8/L can't even do that.)

The later machines also have "EAE Mode B", which has different memory addressing. None of the earlier line has anything like that.

If you wanted your code to run everywhere, you'd avoid those features. There was a concept called "Family of Eight", which had to do with writing code compatible across the line (well, except for the 8/S, which was so lame that no-one cared to code for it).

There are also simple subroutine packages to emulate the EAE (in "mode A", anyway), typically using page 0 locations to represent the MQ and SC contents. If you build my non-EAE version of Space War, it uses one of those, and runs on the entire "Family of Eight".

Vince
 
This is the compatible set of instructions you use on the PDP side for os8diskserver, right?
Right. I think of it more as avoiding the incompatible corners. For instance, no pre-Omnibus machine has IOTs 6XX0 -- they just don't do anything on a Negibus or Posibus machine. That's where the later os8diskserver/SerialDisk versions ran into issues. Earlier versions also used BSW.

My PAL cross assembler mentioned by SpaceHobo above has a "-e" flag. If you have to turn that on to assemble your code, you can be pretty sure that it *isn't* Family of Eight. I believe that it is possible to do everything in the Family of Eight subset, and unless you are really up against a performance or memory size wall (and who is, these days?), why not.

The SIMH project has the issue that they support the 8/E instruction set, which means it does all kinds of "new" stuff. Later models do (mostly) these things too, so a new generation is growing up thinking they know what a PDP-8 was. Before that, the PDP-8 was even more marvelously simple!

The EAE is a seperate issue, as what was later called "mode A" exists as an option for the older machines (except the 8/L). EAE is also not available for the 8/A or DECmate, though they do have an MQ register. I still avoid it generally as not needed by most programs. Space War doesn't need the speed or the space, for instance.

Vince
 
This is the compatible set of instructions you use on the PDP side for os8diskserver, right?
One of my long term projects is to write a program that looks at a PAL program and gives warnings for constructs that will not run on all machines. It will be impossible to do this perfectly because there is self modifying code found a lot of places. The biggest issues are that the Operate micro instructions combine in different ways on different machines.

Serial Disk did originally have a BSW in it and from a Family of 8 compatibility standpoint that was the biggest offender. The more subtle issue was the device 40 and 41 interrupt that would be generated by the second serial port when a Fortran program would run. The FRTS (Fortran Run Time System) turns off interrupts before it makes calls to OS/8 (or handlers) and then turn them back on again when the OS returns. And then an interrupt for one of those device codes would occur and since the FRTS doesn't know what to do with that interrupt it would hang in the ISR. I don't remember if it halted when it got to the end of its checks or if it re-enabled interrupts and returned only to have the interrupt occur again. It doesn't really matter because the program would hang in either case.

The way it first got fixed in serial disk was to turn off the ability of the card to generate interrupts. This approach only works on Omnibus based serial ports. Posi and Negi bus interfaces don't support turning off of specific interrupts and executing that instruction on non-omnibus machines caused its own issues. The solution used was to exit the handler with the device flag disabled.

I talk about this in the chapter about dealing with interrupts in my book. OS/8 handler info
 
Richard Larry tells it that after the VAX team had settled down a bit, he went to the PDP-8 team and said "You guys should make an address extension model to use more RAM, too!" and then the PDP-10 team, and so on. Earlier in the interview he talks a bit about how product teams focused on relative cost of RAM vs other parts in their product sales, and tried to keep a balance that helped both functionality and profits, so that may have helped produce the 8A and the K*-10 units that could address multiple "mobies" of RAM.

But he calls it a "VAX for the Eight" in this interview:

 
The EAE is a seperate issue, as what was later called "mode A" exists as an option for the older machines (except the 8/L). EAE is also not available for the 8/A or DECmate, though they do have an MQ register. I still avoid it generally as not needed by most programs. Space War doesn't need the speed or the space, for instance.

Actually you could get an EAE on the 8/a. They did this by using the 8/e CPU (KK8E). You replaced the M8615 (KK8A CPU) in slot 1 with the bus terminator card and put the other CPU cards in the bottom slots of the 8/a chassis. One of my 8/a machines was equipped this way.

However, using the EAE, even just the MQ transfer instructions renders a program not Family of 8 compatible. It is also a bad idea to use the EAE in an interrupt handler. It is a real pain to restore the shift count register on the Straight 8 and 8/i. They added a way to do this on the 8/e EAE.
 
Richard Larry tells it that after the VAX team had settled down a bit, he went to the PDP-8 team and said "You guys should make an address extension model to use more RAM, too!" and then the PDP-10 team, and so on. Earlier in the interview he talks a bit about how product teams focused on relative cost of RAM vs other parts in their product sales, and tried to keep a balance that helped both functionality and profits, so that may have helped produce the 8A and the K*-10 units that could address multiple "mobies" of RAM.

But he calls it a "VAX for the Eight" in this interview.
As I posted this I realized that I am responding off topic again.

I have one of the 128K memory boards (M8418) and the special memory extension card (M8416) that talks to it. You could also use up to four of the 32k memory boards with it. What makes this off topic is that this extension only works in an 8/a when the cards are in the hex slots. It would be difficult (very or extremely might be good to add before difficult) to add to an older machine like a PDP-12.
 
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