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8032-SK Restoration

Hugo Holden

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I am currently working on a comprehensive memory test system (combination of hardware & firmware) specifically for the dynamic PET where the IC's are soldered in, so as to identify the defective DRAM IC's (with any kind of DRAM defect) and does not require any functioning DRAM to work and checks for refresh problems too, but it won't be finished for about a month.

Some simple observations though. There are essentially 3 common ways the DRAM can fail. A stuck high or stuck low output pin, or effectively an open circuit output pin equivalent to a non responsive IC.

Rarer problems include IC's which ignore ranges of addresses. I have been collecting a large number of 4116 IC's, especially defective ones for experiments and analysis. Failure to retain data over time, effective failure to refresh can be another problem. There are potentially more complex problems and interactions that can occur too.

In the 32k PET the outputs of pairs of the DRAM IC's (in the upper and lower banks ) are shackled together.

In the case where one IC of a pair contributing to the bit is non responsive, or effectively has an open output pin, it does not interfere with the other IC on that bit which it is connected to. If this IC is in the lower bank I, the computer won't boot because all bytes below $4000 are defective . If this bad IC happened to be in the upper bank though, the computer will boot and BASIC will report only 15359 Bytes Free (if the computer is otherwise working). Because when BASIC looked over the address range $4000, the memory returned defective values. An open output pin (or non responsive IC) is interpreted as logic high via the buffers, so this is reflected in the returned byte value and indicate exactly where the defective IC is in bank J.

On the other hand, if any of the DRAM IC's have a stuck high or low output pin the computer (in its normal state without a Pettester system) is disabled. And in this case, any kind of memory test system, can only resolve the defective DRAM IC in a 32k PET down to one of a pair of physical DRAM IC's in the same bit position of the upper and lower bank. Though, that pair is easy to identify from looking at the way the returned bytes have been corrupted and which bit is defective, stuck high or low.
 
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Gary C

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What I'm having problems with is, PETTESTER is not finding any memory errors in either the DRAMS or the SRAMS, all the ROM's checksums are right and the EDIT ROM checks out on my programmer. The keyboard test works fine. When powered up, I get the beeps and the expected startup display.

Yet, when I type, sometimes I get characters, sometimes graphic characters, sometimes I press return and the CPU stops, sometimes I get syntax error, sometimes it just does a CR/LF.

Now as I understand it, as I type, the characters come in through the 6520 and the CPU using the EDIT ROM program transfers them into display memory, then when I press return, it goes into the BASIC area in DRAM as tokenised code.

It feels as if its to do with the screen editing function throwing errors. This is all done in SRAM I believe Dave ?
 

Gary C

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Just noted that one of the SRAM's I used to replace a faulty AM9114EPC is not a 200ns unit like the original but a SRM2114C25 which is a 250ns device. Didn't think it would be enough to cause a problem and it passes PETTESTER but do we think that could be causing the random errors ?
 
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daver2

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I would have thought a 250 ns part would be fine... I haven't run the maths though. If this is for the video RAM - I would have thought that you would have observed problems with a normal display.

Dave
 

Gary C

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Yes, it does seem unlikely but I am clutching at straws now.

I dont understand how it can crash when everything seems to work

I have a couple of PIA's & VIA's coming as spares anyway and will try them, and some SRAM

How does the PET work when editing a program ?
 
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