Update: Powers Up - VFD Lights UP! See pics and offer listing at: https://forum.vcfed.org/index.php?t...m-with-novel-vfd-display-panel-c1977.1249953/
VCF Southwest | Jun 20 - 22 2025, | University of Texas at Dallas |
VCF Southeast | Jun 20 - 22 2025, | Atlanta, GA |
VCF West | Aug 01 - 02 2025, | CHM, Mountain View, CA |
VCF Midwest | Sep 13 - 14 2025, | Schaumburg, IL |
VCF SoCal | Feb 14 - 15, 2026, | Hotel Fera, Orange CA |
According to the manual I'd just started reading this card could take any of MOS 6501/6502 or Motorola 6800 processors; again, it's my guess it's set up for a 6502, but... I don't see any crystal for a clock, was this designed to run off of a multivibrator circuit?
Oh boy, it's my time to shine! Full disclosure, I do not own an original OSI-400, I just have a replica from glitchworks.After reading this I had a vague memory of a line in the ads for the Jolt 6502 that also mentioned using an RC clock with crystal timing optional, so… I guess maybe that mystery is solved? Maybe? I don’t suppose I’m lucky enough that someone on this forum had an OSI 400 and can confirm that this self clocking was utilized.
However, before I built my replica, I dug up as many photos of authentic stand-alone OSI-400's and Challenger 65's that I could find for reference material. And none that I have seen use any sort of crystal or self-contained oscillator can for their main CPU clock circuit.
Really no 6502 CPU in ANY of the 44 pin cards? This surprises me, I thought the CPU card, Memory card and VFD display the first ones, others added after. Is there a blank slot next to the VFD driver card where it should be? It's not much of a computer without a CPU!
I have vague memory of the TVT mounted horizontally above the rack, perhaps between the rack and the front display. If so, that's completely missing or was just future plan.
The 44 pin back plane bus should be wired straight across, not slot-specific. +VC and GND are top and bottom of the bus.
"Select 6000" is my hand-writing, but I have no memory of what this means![]()
I have vague memory that the video sweep had the additional role of refreshing the DRAM bank.
KBD may refer to the numeric keypad. This was used to enter octal program values into memory after cold start.
Sorry I can't remember how the OSI 400 CPU card was used. Most likely the EPROM was something different from what the board was designed for, so I created a daughter-board adaptor to sit on top of the old socket.
My first thought on seeing "SELECT 6000" was that it's a select for the $6000-$7FFF range, which is what you might use for I/O in a system designed for ROM at $8000-$FFFF and RAM starting at $0000. It also falls nicely out of obvious decoding arrangements for that, especially if you're intending to use 8K EPROMs. I used a similar arrangement in one bus I designed for an SBC with ROM, RAM and minimal I/O on the SBC itself, and cards for remaining I/O. This lets you have considerably less decoding on the I/O cards themselves.but this dichotomy of some cards looking like they *only* have data bus lines and a few control lines to them and this card that appears to *mostly* just be an address decoder (*) has me wondering if each slot might have a slot select (similar to an Apple II) and this card is the master? The markings on the piece of tape would make sense if each card were being assigned a 4K address slot...
My first thought on seeing "SELECT 6000" was that it's a select for the $6000-$7FFF range, which is what you might use for I/O in a system designed for ROM at $8000-$FFFF and RAM starting at $0000. It also falls nicely out of obvious decoding arrangements for that, especially if you're intending to use 8K EPROMs. I used a similar arrangement in one bus I designed for an SBC with ROM, RAM and minimal I/O on the SBC itself, and cards for remaining I/O. This lets you have considerably less decoding on the I/O cards themselves.
Front panel - turn the two slot-pins 90 degrees to open, panel is hinged.
Remember though, the Kim-1 has two 44-pin connectors. There were a number of KIM 1 memory expansion articles in Byte and Kilobaud ( eg., this one). It might be worth tracing out the signals.WAIT. It looks like the MOS KIM-1 has 44 pin card-edge connectors? Could this be a KIM memory board?
Remember though, the Kim-1 has two 44-pin connectors. There were a number of KIM 1 memory expansion articles in Byte and Kilobaud ( eg., this one). It might be worth tracing out the signals.
Yep. It was stuck when I tried to open it; I think the little dingus one of the slot pins goes into came loose and is spinning around, so I was putting off going after that until pulling the cards so maybe I could put pressure on it from the back.
That pretty much makes it a slam dunk it’s acting as a decoder for other cards; I guess the question is if the bus is parallel across all slots and the cards are wired to their chosen select pin, or if the slot this card was in is “special” and cards decode depending on what slot they’re in.
But so too are your skills to create these boards so many years ago and do it with what was in your means. No embarrassment needed.You're doing an absolutely amazing job of deciphering unlabelled spaghetti! Embarrassed that my mediocre soldering/construction skills are finally exposed!