eeguru
Veteran Member
I just read yet another post today from someone claiming adding the DMA memory expansion card to a 1000 {A, EX, HX} made the machine 'faster'. I would really like someone to explain this one to me at a technical level as I don't understand how this was verified. A couple theories:
1) With an 8237A, DRAM refresh could be off-loaded from a CPU timer interrupt. The Tandy variation of the 8-bit slot has HOLD/HLDA and 20-bits worth of addressing. So it could, in theory, do automatic scheduled DRAM refresh for all lower system memory. However, has anyone ever found evidence (BIOS fragment, benchmark, etc), that this is the case?
2) With an 8237A, floppy sector transfers could be offloaded to the DMA controller and not done via PIO (move + in/out + loop). However the BIOS routines are synchronous. The CPU doesn't have anything to do but continuously poll status registers or marshal the result. PIO loops 6 bytes or less may not generate any instruction fetches. But, the wait states on the data register I/O movement instruction could be saved per byte via DMA. And the floppy DMA req/ack lines are also present on the ISA slot. But again, has anyone ever found evidence (BIOS fragment, disk I/O benchmark, etc) that the BIOS floppy transfer routines really do auto-detect an 8237A and adjust?
3) Other known speed up mechanisms?
I find it *very* hard to believe that at least the 1000/1000A BIOS writers were so forward thinking they would have included advanced support for #1 or #2. Maybe on the EX and HX. However I've disassembled much of that BIOS in the past and don't recall ever finding 8237A-related code. I think it's more plausible that they changed the IBM 8-bit slot pins slightly so that DMA support could be added in the future to support an as-yet undefined peripheral use case - there is still one unused channel ack/req set on the Tandy 8-bit bus.
If you know for a fact how the machine is sped-up and can point me to either benchmark data or a BIOS location, please educate me! Thanks!
1) With an 8237A, DRAM refresh could be off-loaded from a CPU timer interrupt. The Tandy variation of the 8-bit slot has HOLD/HLDA and 20-bits worth of addressing. So it could, in theory, do automatic scheduled DRAM refresh for all lower system memory. However, has anyone ever found evidence (BIOS fragment, benchmark, etc), that this is the case?
2) With an 8237A, floppy sector transfers could be offloaded to the DMA controller and not done via PIO (move + in/out + loop). However the BIOS routines are synchronous. The CPU doesn't have anything to do but continuously poll status registers or marshal the result. PIO loops 6 bytes or less may not generate any instruction fetches. But, the wait states on the data register I/O movement instruction could be saved per byte via DMA. And the floppy DMA req/ack lines are also present on the ISA slot. But again, has anyone ever found evidence (BIOS fragment, disk I/O benchmark, etc) that the BIOS floppy transfer routines really do auto-detect an 8237A and adjust?
3) Other known speed up mechanisms?
I find it *very* hard to believe that at least the 1000/1000A BIOS writers were so forward thinking they would have included advanced support for #1 or #2. Maybe on the EX and HX. However I've disassembled much of that BIOS in the past and don't recall ever finding 8237A-related code. I think it's more plausible that they changed the IBM 8-bit slot pins slightly so that DMA support could be added in the future to support an as-yet undefined peripheral use case - there is still one unused channel ack/req set on the Tandy 8-bit bus.
If you know for a fact how the machine is sped-up and can point me to either benchmark data or a BIOS location, please educate me! Thanks!