The 6502 only has a primitive interrupt. The interrupt vector must be at FFFE and FFFF in low byte, high byte format and it is up to the interrupt handler routine to figure out what caused it. The non-maskable interrupt would be fetched from FFFA and FFFB but is not used in the PET.
I think the PET only uses an interrupt for the jiffy clock. 60 jiffies per second (an interrupt every 16.67 mS). I'll have to look into the IRQ service routine.
We'll have a look at that and we'll do that experiment tomorrow.
I did check CB1 of PIA1 ( U7 pin 18 ) and you can definitely see a precisely 16.6and something ms 'clock' in, which is certainly is the 60 Hz interrupt.
I don't know if I could simply ( for debug ) connect ( maybe via a resistor better ) pin 18 to pin 37 - IRQ ) and use that as a test interrupt generator for my own test routine. (*)
Funny thing is WITHOUT U7 inserted it NEVER goes into the monitor.
When U7 is inserted it ALWAYS goes into the monitor but it freezes us there.
It's like the cursor flashing and KB scanning routine is never executed.
Now not sure how it works .. let's suppose by absurd the 6520 is faulty .. heck knows what could happen, maybe the program stuck in some loop waiting for something to happens that never does.
But .. both 6520 not working ?
Suspicious ..
VIA not working ? .. don't think so, I have 3 different 6522 chips I can't believe all of the 3 are not working.
Yet the HW seems "so simple" you could say "unless the code is totally crap" how it could even fail to run the correct thing ?
Hum ..
(*) actually probably not because the "vsynch" signal stays low too long, I think IRQ is level sensitive not edge sensitive right ?
If it says low 'too long' by the time my interrupt routine is finished and I re-enable the int I could get an int immediately after instead of 16.6 ms later, you would need to feed that to a S/R latch and have a way to clear it before to re-enable ints.
(edit) I am very tempted to do an experiment that is :
Leave the 6520 out
Put the NMI vector the same of the irq
Connect a wire from the 60 hz int to NMI
See if I get at least the fashing cursor
Or do the all above with my custom irq thing at the same address to test if interrupts are served ok.