Hi thanks for your reply.
It is the 320008 logic board. The blue badged pet.
I should have mentioned that I have already tested the 5v output rails and they are all working.
I do have an old analogue osciloscope and I have multi meters.
I have not used the oscilascope until this week. Just been learning how-to set it up.
Just added my location.
Frank
It is great that you have the scope.
I can give a few tips on repairing circuits with TTL "glue Logic".
One thing is that generally the output pulse high and low voltage levels should fall in a range that suggests the output stage of the device, is normal.
Usually logic lows are below 0.4V, certainly below 0.8V and logic highs in the range of 2.7 to 3.5V (unless there are pull up resistors seen for example on open collector outputs and it approaches 5V). Also IC's with open collector outputs can look dead if something happens to the pullup. A logic level in the range of 0.8V to 2V is sort of ambiguous for TTL and would be suspicious. Most TTL gates have a voltage threshold where they appear to switch at around 1.2 to 1.4V.
If you see an ambiguous level of say around 1 to 1.5v on a TTL IC's output, generally there is something wrong. The options are that the IC's output stage has failed, or there is loading on the output pin, or that two outputs, say tri-stated onto a bus line are "fighting" each other, one pulling high & the other low.
In general though, it is relatively uncommon for a TTL's IC's input stage to fail in a way where it loads the pin of another IC's output feeding it. It can happen rarely, but this is much rarer than the output stage in a TTL IC failing. So in this situation suspect a failed output stage first, rather than a loading effect from any inputs connected to that. One way to be sure is to just solder suck the output pin and free it up in the pcb hole, to disconnect it this way for a test, rather than cutting a pcb track.
One failure mode that appears to be more and more common in aging TTL IC's, is that an input pin goes open circuit inside the chip. It then assumes a high logic level (that open circuit TTL IC inputs do) in the die inside the IC. If it is a simple inverter or buffer IC, it is easy to find as the output is stuck & non responsive. So an output pulse or active logic state is "missing"
However, the interesting scenario crops up where the input pin is say one of the inputs to a gate, like a AND or NAND for example goes open internally. What happens is, all looks normal with a single channel scope probe test around the gate, as there are pulses seen on all its pins, inputs and outputs. But, the logic is defective and the overall circuitry malfunctions. To find this requires checking the timing of the pulses with at least a two channel scope and seeing if the particular gate is obeying its logic table functions.
One other thing, especially if an IC is not in a socket, that before concluding it is defective, it is really better to fully check its logic functions by examining all pins with the scope and making sure it is not being inhibited by incorrect logic signals feeding it, and that includes not just the presence or absence of those signals, but the timing of those signals. Imagine for example a D flip flop the importance of the time of the clock pulse edge with respect to the data input.
What I'm getting at here, it that sometimes faults can be found based on the absence of pulses, or defective logic levels on IC output pins. Also sometimes they can be found if there are thermal effects reversed by freeze spray. However, sometimes all the pulses can be present and accounted for, but there is a defect in the logic (eg internally open gate inputs) or a signal timing issue , which is where the scope comes in handy and a logic probe fails to be of any help.
Cmos are interesting, especially in the old 4000 series, in that they have a penchant for their output stages to go open circuit, leaving the inputs they are connected to floating which charge to a high or some ambiguous level. In these cases even attaching a x10 scope probe will discharge the gate inputs, making it look like a logic low, but it was high before the scope probe was connected.
