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Neglected PET needing some love

Excellent work...

Let it run for a while and then revert the /CASx wiring back again so that the 16K banks are the correct way round once again.

We then need to see whether PETTESTER can successfully see (and test) the full 32K - or whether replacing RAMs that we needn't have done has introduced some problems again...

Dave
Looking good so far. It reports 32k regardless of the CAS swap or not. Swapped it back to normal and the comprehensive tests are running now. I'll let the tests run a few times to be sure.
 
>>> It reports 32k regardless of the CAS swap or not.

Of course it would!

Excellent work.

You can see that looking for blocks of power-of-two faults and then replace that DRAM chip. Then repeat as necessary until fixed...

Dave
 
Great work.

When you say wobbly video when cold, can you make a video of that ?
Sure I'll post that later today when I bring the pet back up into the office to hook up to the RGB2HDMI.

I probably shouldn't say "wobbly video" as that makes it sound like an analog problem. The video output right now is digital RGB out of the user port and going into an RGB2HDMI so it can't exactly be "wobbly". A better choice of words would have been "unstable character definition". An example of this can be seen in an earlier post on this thread: https://forum.vcfed.org/index.php?threads/neglected-pet-needing-some-love.1240018/post-1279493

However I will say since I started working on this PET the amount of time it takes for the characters to stabilize has gone down.
 
This 'may' be an artefact of me updating the video screen contents with the PETTESTER, the PET video circuitry, the video converters you are using and the monitor you are using rather than a fault?

The original PET would have a proper CRT monitor (with phosphor that will 'smooth out' any video glitches). However, your digital monitor will not. A fast LCD/LED panel may respond too well to the updating video signal...

Just a few thoughts off the top of my head.

Dave
 
This 'may' be an artefact of me updating the video screen contents with the PETTESTER, the PET video circuitry, the video converters you are using and the monitor you are using rather than a fault?

The original PET would have a proper CRT monitor (with phosphor that will 'smooth out' any video glitches). However, your digital monitor will not. A fast LCD/LED panel may respond too well to the updating video signal...

Just a few thoughts off the top of my head.

Dave

I noticed this before I got the pettester rom installed (the video in the earlier post). Also I have tried swapping back in the original PET rom (when I did the "Hello VCF" post) and this was an issue there as well, although it had cleared up by the time I had the recording going. I doubt it's the RGB2HDMI or the monitor I use this monitor for lots of systems. I always suspected it was a capacitor issue (or multiple capacitors).

I know, I know, blame caps for everything, but hey sometimes they are to blame :)

I could go ahead with the monitor swap and see if the issue persists afterwards. But before trying that I'm going to want to get a bit healthier because I'm kind of having brain fog right now. Also I need to go back and re-read the earlier posts in this thread because there was a lot of useful knowledge there about the CRT transfer that I didn't really grasp.
 
Hey all I have an update on this. I'm not sure if anyone is still watching this thread it's been a while.

Anyway I recently picked up an Apple Monitor ]I[ (or is it /// ?)
It's one of those 12 inch green phosphor displays with a composite input.

I've been thinking I want to use it on the pet, but I don't want to put the CRT into the PET rather I want to keep the monitor as it is, plop it on top of the PET and use it like that.

I've been trying to find out how to do the composite conversion. I found this thread which looks like it'll get me most of the way there (if not all the way) if I can wrap my head around it.
What I gathered is I need to build some kind of circuit to generate the composite signal, then I need to find (or make) a custom editor rom to prevent having to poke some values into the CRTC registers on startup (which I wouldn't be able to do since I'd have no display) and I think there might be a jumper somewhere on the board I might need to jump as well, I'm a little fuzzy on that.

So that's the big picture what I need are the details. Presumably others have done this so I assume such an edit rom is floating around somewhere (for NTSC) and as for the circuit I found this and the 2nd one (Version: Composite Video (pucoe) 1.0C) looks like what I probably want but I am not sure if this was designed with the CRTC in mind or if this will only work on a non-CRTC pet.

I wanted to go this route for a few reasons:
1) I don't have that much confidence in my ability to swap CRTs without trashing something.
2) I'd like to be able to use the Apple monitor on other things sometimes, I'm wanting to set this computer up on my work bench so that monitor could come in handy in future projects.
3) I'd like to be able to power-cycle the computer without having to power-cycle the monitor.
 
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If the Apple monitor has composite-in I would say build your composite circuit and try it as it is. The Apple monitor may be perfectly happy to operate at a 'foreign' frame rate but if the PET and the Apple monitor are both from the same country originally I would tend to assume that they probably natively operate at the same frame rate.

'NTSC' and 'PAL' mainly refer to different methods of superimposing a colour (chroma) signal onto the monochrome luminance signal so they aren't really relevant when the signal coming from the source is a monochrome-only signal, although it is true that the frame rate for systems from NTSC countries is usually 60Hz and the frame rate for systems in PAL countries is usually 50Hz, so provided both systems originally used a standard definition video signal, that's the only possible difference that really comes into play here.

Summary: Build your composite interface and just see if it works. Maybe try it with a 'standard' display which has a composite video input first, like a TV with AV-in.
 
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I found this thread which looks like it'll get me most of the way there (if not all the way) if I can wrap my head around it.
The circuit on post #43 of that thread, using four open collector inverter gates and a 2N2222 transistor looks very good to me. That should work fine to drive the Apple VDU, with one caveat.

The H.drive pulse in the PET, is not really an H sync pulse, it is much wider.

Even the V drive pulse is wider than an actual V sync pulse.

Ideally, the Apple VDU is expecting to see a vertical pulse that is about 3 H periods long (about 3 x 64uS) . The Vertical drive pulse from the PET is essentially equivalent to the blanking interval or vertical flyback width, which is about 0.8mS, though in the PET the V drive pulse is even longer at 1.26mS as I recall. A composite input VDU will synchronize the vertical scan with a much wider than standard pulse like this (assuming the correct polarity), it is just that sometimes this can result in tearing of the image at the start of the V scan. This was a problem in the SOL-20, where the width of the V sync pulse was about 3 times that of standard and it upset some, but not all VDU's, by upsetting the sync separator circuit.

The H sync pulse the VDU is expecting is about 5uS wide, or about 8% of the H scan time and the H drive pulse in the pet is much wider.

The way to fix this is to pass the H & V drive signals from the PET via some inverter gates with capacitive coupling between them, to differentiate the pulses, to shorten the drive pulses down to the width of the standard sync pulses, before they are mixed together in a circuit like the one shown on post #43. There are good circuits for pulse shortening to get H & V syncs, in the SOL-20, worth looking at the schematic, though the 100k resistor in the vertical one needs lowering to around 33k to make the V pulse closer to standard.

I'm sure somebody has posted a circuit that does this for the PET drive signal to get a good composite signal, but I'm not sure where the link is to it.
 
I think the Apple monitor has a Horizontal frequency compatible with NTSC of about 15.6 KHz while the 8032 PET has a Horizontal rate of 20 KHz. If the Apple monitor can not capture the PET signal then you can use Steve Gray’s special EDIT ROM that programs the CRTC for the 15.6 KHz rate.
 
I think the Apple monitor has a Horizontal frequency compatible with NTSC of about 15.6 KHz while the 8032 PET has a Horizontal rate of 20 KHz. If the Apple monitor can not capture the PET signal then you can use Steve Gray’s special EDIT ROM that programs the CRTC for the 15.6 KHz rate.
I forgot the 8032 PET is quite different from my 2001 PET.

The Apple probably could capture that higher scan rate with a small modification to the H osc section, to center the running frequency on 20kHz, but the scan width would be significantly reduced, and possibly even shorting out the width inductor might not bring it to full width. Better to re-configure the CRTC I agree.

I think the better thing is to repair the original PET 8032 VDU and put a replacement CRT in it.
 
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I'm fairly certain if I have a proper composite circuit it'll work with this monitor just fine I'm not worried about an NTSC vs PAL issue I already know the monitor is NTSC as I've tested it with other NTSC composite sources.
Taking a look here I think what I want is probably sjg-edit-80-b-ntsc (2017-09-21).bin because it's an 80 column (8032) and it has the business keyboard.

As for the circuit I've seen probably about 4 or 5 different versions and they all are slightly different.
For example this one which I took from this video:
davesGarageSchematic.gif

shows the video signals being sourced from J1 with pins 1, 4, and 6 as ground whereas on my PET I would be sourcing the signals from J7 with pins 2, 4, and 7 as ground so already I'm skeptical that this schematic would be compatible with my pet.

The one on the aforementioned post shows the video coming from J3 and I'm not at all certain what's going on with J6 or a DIN connector.

And even this one which I mentioned earlier looks pretty good except I don't understand why the video signals are coming from a DB9.

That last one is noted to have come from an article in a newsletter from the "Commodore PET Users Club of England" and some other page (which I can't find anymore) also referenced that same newsletter saying "...as found on the internet..." well I haven't been able to find that newsletter but I wish I could so I could read the whole thing rather than just having the schematic.

What I would like is a little more detail about building the circuit, specifically for my PET (an 8032 with a CTRC) and even more specifically with the goal of an NTSC composite output.
Like the schematic is great but also it would be nice if I could find what changes need to be made to the hardware of the PET (adding jumpers, cutting traces, whatever) and software (ROM changes) to make it all work.

There's a fair bit of information out there but there's a lot of variations of the circuit (probably due to variations in the PET itself, and also the PAL vs NTSC thing) but so far all of the schematics I've seen are just kind of presented as "well here it is, this is the PET composite circuit" rather than "this is *A* PET composite circuit for *THIS TYPE OF PET* and with *THIS VIDEO STANDARD* as a result. So ... a lot of guesswork on my part.

Example from here:
To use the vdc board with a standard TV set for example, a so-called "composite video" signal must be generated, that includes all three video, horizontal sync and vertical sync signals. This board is derived from the "PET Video Mixer" by the PET users club of England.
What "standard" PAL or NTSC and which PET? Well considering it came from the "Pet users club of England" probably PAL.
 
PAL and NTSC are color encoding systems which stand for phase alternate line and never twice the same color (because of chroma phase errors altering the hue). But joking aside, these are often used in popular culture to refer to the different TV standards related to the number of lines in the raster and the sync pulse frequencies, in other words the monochrome part of it.

In the PAL system the vertical sync frequency or field frequency is 50Hz and the H scan frequency 15,625 Hz. The H scan period is 64uS as is the H sync pulse interval, and the V scan period & V sync pulse interval is 20mS. TV scans of course are interlaced with consecutive fields having a 1/2 line offset, seldom done in very vintage computers. TV composite signals were interlaced prior to WW2.

In the NTSC system: In the vintage monochrome TV era the H scan rate was 15,750 Hz and the field rate 60Hz, these got tweaked to 15,734 Hz and 59.94 Hz to accommodate NTSC color. So that the NTSC H scan period is about 63.5uS and the V scan period about 16.7 mS.

When it comes to monochrome TV's & VDU's, the H scan osc will normally pull into range between either standard on the H hold control as the difference between 15,625 and 15,734 Hz is small. The V scan osc often won't come into lock, it simply requires an adjustment to the V scan oscillator, typically changing the timing capacitor value to get the V hold control into the center of its range.

When it comes to the color encoding system , the two systems of NTSC & PAL are unique. Essentially PAL provided a way to eliminate the hue control of the NTSC system with automatic cancellation of phase errors in the color signal. One interesting difference is that in the NTSC system, there are 4 unique color fields. But in the PAL system there are 8 unique fields. So to create a perfect still frame TV image in PAL, you have to store 8 fields, and 4 for NTSC image and just 2 for monochrome, in either system to account for the odd & even field.
 
Yes, the PET doesn't output a colour / chrominance signal - so all you get for your money is the luminance component. The large difference between PAL and NTSC is, therefore, largely irrelevant.

The PET EDIT ROM is generally the thing that decides whether it is a 50 or 60 Hz frame refresh or not - but I will have to double-check how the original 2001 PET did this (if it ever did) when I get home.

Dave
 
I'm fairly certain if I have a proper composite circuit it'll work with this monitor just fine I'm not worried about an NTSC vs PAL issue I already know the monitor is NTSC as I've tested it with other NTSC composite sources.
Taking a look here I think what I want is probably sjg-edit-80-b-ntsc (2017-09-21).bin because it's an 80 column (8032) and it has the business keyboard.

As for the circuit I've seen probably about 4 or 5 different versions and they all are slightly different.
For example this one which I took from this video:
View attachment 1251589

shows the video signals being sourced from J1 with pins 1, 4, and 6 as ground whereas on my PET I would be sourcing the signals from J7 with pins 2, 4, and 7 as ground so already I'm skeptical that this schematic would be compatible with my pet.

The one on the aforementioned post shows the video coming from J3 and I'm not at all certain what's going on with J6 or a DIN connector.

And even this one which I mentioned earlier looks pretty good except I don't understand why the video signals are coming from a DB9.

That last one is noted to have come from an article in a newsletter from the "Commodore PET Users Club of England" and some other page (which I can't find anymore) also referenced that same newsletter saying "...as found on the internet..." well I haven't been able to find that newsletter but I wish I could so I could read the whole thing rather than just having the schematic.

What I would like is a little more detail about building the circuit, specifically for my PET (an 8032 with a CTRC) and even more specifically with the goal of an NTSC composite output.
Like the schematic is great but also it would be nice if I could find what changes need to be made to the hardware of the PET (adding jumpers, cutting traces, whatever) and software (ROM changes) to make it all work.

There's a fair bit of information out there but there's a lot of variations of the circuit (probably due to variations in the PET itself, and also the PAL vs NTSC thing) but so far all of the schematics I've seen are just kind of presented as "well here it is, this is the PET composite circuit" rather than "this is *A* PET composite circuit for *THIS TYPE OF PET* and with *THIS VIDEO STANDARD* as a result. So ... a lot of guesswork on my part.

Example from here:

What "standard" PAL or NTSC and which PET? Well considering it came from the "Pet users club of England" probably PAL.

One thing with this schematic, if you look at the design of it, it has a pulse shortening system with the 2200pF capacitor, that helps. However, the circuit's output resistance is relative high, as the signal is developed across the 390 Ohm resistor.

Most VDU's have a 75 Ohm input impedance, and the idea is that you use 75 Ohm coaxial cable and that the output circuit that drives that 75 Ohm cable has a 75 Ohm output impedance too. Though some VDU's have a high-Z switch that raises the input resistance to around 1k, which this circuit could drive reasonably well, though the frequency response would not be ideal.

When a video signal output stage, with a 75 Ohm output impedance is un-terminated, the peak to peak composite video voltage (sync + video signal) there at the output terminals is 2 Volts. When the 75 Ohm cable, terminated at the VDU end with a 75 Ohm resistance is connected, the signal drops to 1V peak to peak at the VDU end. The low impedance and "terminated link" and impedance matched cable ensures that a good high frequency response in the video is maintained (nice sharp characters & graphics etc) For computers the video bandwidth is up to 8MHz or more here, even though most TV's it was rarely above 5MHz.

The reason that other circuit with the 7405's and the 2N2222 transistor is good, in my opinion, is that the sync & video signal mixing is very predictable , set by the resistor ratios in the transistor's base circuit, the open collector gates don't contribute to the levels much because their output transistors only sink current and are operating in a saturated condition. Also, the 2N2222 transistor, wired as an emitter follower, lowers the output resistance to correctly drive a 75 Ohm cable and a 75 Ohm "terminated" load. But the circuit lacks the pulse shortening of the PET's H & V drive signals, required to get the sync pulses the correct width for the VDU in the composite signal, which is about 5uS for the H pulse and around 200 to 300 uS for the vertical pulse, not much longer or some sync separators in some VDU's protest, as was discovered with the SOL-20 where the V sync was accidentally too long at around 800 to 1000uS as I recall. The PET's V drive pulse itself is far too long at about 1260uS.

Also, there is something else; I think in the past I had determined that the H drive pulse presented by the 2001 PET to the 9" VDU, had opposite polarity to that presented to the 12" VDU from later PETs with the CRTC, because I had noticed a different number of drive signal inversions (transistor stages) leading to the H output transistor in the two VDU's, I will have to check on this again in case I'm wrong. If this is the case, the required circuit to create a good composite video signal, from the PET signals, would also need a switch, to either invert or not invert the H Drive signal, prior to shortening the pulse, so the adapter could work with all PETs.

Later today I will have a look at all this and post a schematic.
 
I have attached a schematic.

Not only is the H drive pulse inverted on the 12" VDU, so it the video polarity compared to the non CRTC 9" VDU PET's

Obviously if an adapter to make composite video is to be of any use, it would have to cover both types of PET's. So I made it do that with a DPDT switch.

The circuit using the open collector gates (using a 7405) is good for a method to compose a composite video signal.

You can see for yourself that when neither of the gates coupling the sync are active, and the video voltage is high (peak white), the base voltage of the transistor is 370/(330 +370) x 5V = 2.64 V. Subtracting the 0.64, for the B-E junction drop of the 2N2222 transistor, the emitter voltage is close to 2V, perfect. At the other end of the coax cable at the VDU end, the 75 Ohm resistor there results in a 1/2 voltage divider, so you get the standard 1V peak white video signal.

If an H or V sync pulse comes along, it takes the transistor's base voltage close to zero, so the sync pulse base sits near zero volts, again fine.

But what about black level ? When the video voltage is low, corresponding to black, the 270R resistor is effectively shorted out. So the voltage divider is now a 330R and a 100R resistor. So the voltage on the transistor's base is 100/(330 + 100) x 5v = 1.16V. Subtracting the 0.64V B-E drop the output voltage is then 0.52 V, though probably a tad closer to 0.6V as the Collector -emitter drop of the output transistor in the 7405 gate is not zero volts. That gives a near perfect level of around 0.3V for the sync pulse to black level , again when the output is terminated into 75 Ohms at the VDU end.

The pulse shorteners (with some modification to lessen the width of the H & V drive pulses) are taken from the SOL-20 design. Essentially what you are seeing is a cheap way to make a mono-stable multivibrator using inverter gates.

I have not built this design, yet. But is seems the sensible way to create composite video from the PET's H & V drive & video signal. Please check it. I don't have a CRTC PET myself, or the 12" vdu to play with.
 

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I have attached a schematic.

Not only is the H drive pulse inverted on the 12" VDU, so it the video polarity compared to the non CRTC 9" VDU PET's

Obviously if an adapter to make composite video is to be of any use, it would have to cover both types of PET's. So I made it do that with a DPDT switch.

The circuit using the open collector gates (using a 7405) is good for a method to compose a composite video signal.

You can see for yourself that when neither of the gates coupling the sync are active, and the video voltage is high (peak white), the base voltage of the transistor is 370/(330 +370) x 5V = 2.64 V. Subtracting the 0.64, for the B-E junction drop of the 2N2222 transistor, the emitter voltage is close to 2V, perfect. At the other end of the coax cable at the VDU end, the 75 Ohm resistor there results in a 1/2 voltage divider, so you get the standard 1V peak white video signal.

If an H or V sync pulse comes along, it takes the transistor's base voltage close to zero, so the sync pulse base sits near zero volts, again fine.

But what about black level ? When the video voltage is low, corresponding to black, the 270R resistor is effectively shorted out. So the voltage divider is now a 330R and a 100R resistor. So the voltage on the transistor's base is 100/(330 + 100) x 5v = 1.16V. Subtracting the 0.64V B-E drop the output voltage is then 0.52 V, though probably a tad closer to 0.6V as the Collector -emitter drop of the output transistor in the 7405 gate is not zero volts. That gives a near perfect level of around 0.3V for the sync pulse to black level , again when the output is terminated into 75 Ohms at the VDU end.

The pulse shorteners (with some modification to lessen the width of the H & V drive pulses) are taken from the SOL-20 design. Essentially what you are seeing is a cheap way to make a mono-stable multivibrator using inverter gates.

I have not built this design, yet. But is seems the sensible way to create composite video from the PET's H & V drive & video signal. Please check it. I don't have a CRTC PET myself, or the 12" vdu to play with.

Wow thanks I think I'm going to go ahead and try to build this and I'll let you know how it works for me.

I have a couple questions, and please excuse my ignorance but I don't have any formal training in electronics and I feel like I'm only now starting to actually look at schematics and understand them on some level.

I was looking at the data sheets for SN7405 and CD4094 and it looks like they both serve the same function: an array of 6 NOT gates. Can you tell me what the difference is between the two, is it just a matter of what voltage levels they are designed to work under?

Second question, I noticed there's a few places here where the output of one gate is sent into another gate. What is the difference between doing that and just bypassing both gates entirely? Is the output signal a different voltage than the input or is there a timing difference which is required?
 
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